Re: sym to verilog-ams

[karl]

Al Davis:
> On Sun,  3 Apr 2022 13:14:57 +0200 (CEST)
> karl@aspodata.se wrote:
> > The pintype attribute [1] does not line up with the verilog ones.
> > According to [2], [3] is the only user of this and it checks which
> > connections are allowed.
> 
> What you are calling "pintype" (in, out, io, and others) corresponds to
> the port directions "input", "output" and "inout", but it is probably
> best when converting a schematic to not specify this.

Also, the pintypes pas and pwr are unhelpful.

> Rather, to
> preserve the data, find a way to express in as an attribute (see
> section 2.9 of VAMS-LRM-2-4.pdf).

Ok. Preserving data is a separate task, I could just include it as a 
comment or point to the original file as a first step.

> In a schematic, we all use those symbols (pins with directions) to
> express how we think of the pins, as inputs and outputs, but that is
> usually incorrect in a simulation as a "conservative system", such as a
> Spice-type simulation that Gnucap mostly does.
> 
> In Verilog, the easy and correct workaround is to just not use them.
> Do not use the port declarations "input", "output" or "inout".
...

Good.

Regards,
/Karl Hammar