Re: [Gnucap-devel] ELEMENT interface question

[al davis]

On Tuesday 20 November 2012, Felix Salfelder wrote:
> > The "bm" functions are a throwback to trying to do some
> > notion  of behavioral modeling within a spice
> > syntax.  They don't let you define new devices, just to
> > embellish existing ones, such as a nonlinear or
> > temperature dependent resistor.  It's still a resistor.  A
> > resistor is a two terminal device defined by v = f(i),
> > without storage.
> 
> thats understood. but why should that be limited to spice? in
> verilog something similar to

It shouldn't be.  The whole "obsolete_callback" mess is 
incomplete work.

> somefilter #(type=fir, coeffs=(1,2,3)) vcvs(a,b,c,d);

That's a device of type "somefilter".  It's name is "vcvs".



> 
> should be possible/might already work in -uf (after some
> set_parameter_* hacking).

What does the standard say?

A lot can be done that the Verilog people didn't think of.  Not 
sure how to specify it within the scope of the Verilog (or spice 
or spectre ..) language.

With the ability to change languages, in general how do you deal 
with features that are supported by one but not another?

Some examples ..

spice current controlled sources, in Verilog.

spice-3 "B" device, not currently implemented in gnucap .. 
irregular syntax.

VHDL ability to specify multiple "architecture" for single 
"entity" .... but do that in Verilog.  Gnucap was designed to 
support this, but long before VHDL-AMS existed.(see footnote)

The issue is not how to do it (it can be done) but how to 
specify it within the constraints of a chosen source language.




(footnote)
I recall, after implementing the first try at what is now the 
d_logic mixed-mode code, with implicit mode conversion ..  going 
to a meeting of the people who eventually came up with what we 
now know as VHDL-AMS, and being rather stunned that they seemed 
to have no idea what such a language might be used for.  This 
was also several years before any public release of ACS, 
predecessor to gnucap.

At the time, I was looking into a language to use for high level 
analog synthesis, but ended up not following through.  As a 
matter of expediency, I decided to do my Ph.D. on the much 
simpler topic of mixed-mode simulation.  As far as I can tell, 
still today, about 25 years later, not much has been 
accomplished on this, as the researchers concentrate optimizing 
specific already designed topologies instead.