Re: [Gnucap-devel] Summer of code: Gschem analysis for parsing

[address@hidden]

>On Thu, May 24, 2012 at 1:18 AM, al davis <address@hidden> wrote:
> > On Monday 14 May 2012, address@hidden wrote:
> > http://gnucap.org/dokuwiki/doku.php?id=gnucap:user:language_plugin_for_gschem
>
> Mapping of geda "device" to verilog ...
>
> All you can do is pass it on.  There is no way of knowing info
> such as the symbol says "VOLTAGE_SOURCE" and Verilog needs
> "vsource".  All you can do is pass it on.  The symbol needs to
> be corrected, or there could be some way of mapping that is user
> controlled.  It could be as simple as "`define", but sometimes
> there could be node and parameter mapping as well ..

So, does this mean that the netlist parsed from gschem will contain
VOLTAGE_SOURCE, RESISTOR etc ? And then we define a module(subckt) for
that device which can be user-controlled?. But as a default shouldn't
we map standard symbols to the standard models (modules?).

> Use of "place" ...
>
> You cannnot rely on names (device names or node names) having
> any meaning.  They are just strings.  So (for example) the
> relation between "placeR1" and "R1" cannot be relied on.

Ok, that's right. So do I index a component and it's associated
attributes(paramters) using associated arrays/lists?

> A "place" connects to a node, and has locations as parameters.
> So, even if the names change it stays located.
>
> I did not locate devices, only nodes.  The devices would float
> and place themselves *reasonably* between the nodes, which are
> explicitly located.

I thought placing devices would be straight forward and fine wrt
parsing. But now I see the advantages of locating nodes instead of
devices. Moving devices freely wouldn't change the netlist. That's
fine.However, in this case of placing nodes rather than devices, the
original placement of devices (which are placed between nodes) may not
be reproduced from the netlist obtained by parsing the schematic
(unless of course there is a definite way of defining nodes for a
device and a definite way to place a device between those nodes).
Although the placement of devices might not be important for
simulation but will come to effect when looking at a layout schematic
or may be when doing post-layout IBIS simulations .

-- 
Savant Krishna | Junior Undergraduate | Electrical Engineering | IIT Bombay