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Re: [Gnucap-devel] commands in verilog mode.

From: Nathan Kohagen
Subject: Re: [Gnucap-devel] commands in verilog mode.
Date: Fri, 30 Nov 2007 20:31:51 -0800
User-agent: Thunderbird (X11/20071115)

al davis said the following on 11/30/2007 04:13 PM:
Verilog doesn't specify commands. As far as I know, there are no existing native Verilog-AMS simulators. It looks like gnucap is leading here.

From what I see,in commercial simulators, Verilog-AMS is only supported through something like a plugin mechanism. The main circuit seems to be spice format, or maybe a proprietary format.



Hi Al,

Related to adding support of Verilog-AMS, I think something that would be great is support for a digital simulator (such as Icarus Verilog) to control the gnucap analog kernel. When performing mixed-signal simulations there is usually large amounts of digital with one analog portion that you are targeting for the test and other analog blocks to support the test.

What I am invisioning is a replacement for Mentor Graphics ADvanceMS (Modelsim + Eldo) or Synopsys Discovery (VCS + Nanosim).

Support for Verilog-AMS could be accomplished as a preprocessor script to split into the digital (Icarus Verilog = Verilog-D) and analog (gnucap = Verilog-A/SPICE) kernels and link the whole mess together. Verilog-AMS is really a superset, so I think we should be take pieces that already good by themselves (Icarus and gnucap) and make them work together.

Just getting a Verilog-D inverter in Icarus Verilog driving a SPICE inverter in gnucap would be a good start.

Support for linking in SystemC and VHDL to digital simulations in Icarus Verilog (would probably need a name change then) would nice. VHDL-AMS could be handled as part of the preprocessor step like Verilog-AMS. Adding Spectre support (as you have mentioned in recent postings) will make the analog part of the equation even more flexible!

An interesting paper is on creating a mixed signal environment with SystemC is:
by H Aljunaid and T J Kazmierski in ISCAS 2004.

It describe the lock-step execution that needs to take place between the digital and analog kernels - rewinding the time-step, etc.

If gnucap was made to work with Icarus Verilog it would be also be controllable from SystemC and we would be effectively recreating SEAMS from the paper. I thought SEAMS was a parallel simulator that supported VHDL and later VHDL-AMS. Is this the same enviroment?

I would like to help create a mixed-signal environment.
Anyone else interested?


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