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From: Grzegorz Jakacki
Subject: [gfsd]
Date: Thu, 1 Nov 2001 08:29:03 +0800 (CST)

--- alliance.txt        Thu Nov  1 08:27:30 2001
+++    Thu Nov  1 08:27:48 2001
@@ -12,7 +12,7 @@
 %%short-description: CAD tools
 %%full-description: Complete set of free CAD tools and portable
-libraries for VLSI design. It includes a UHDL compiler and simulator,
+libraries for VLSI design. It includes a VHDL compiler and simulator,
 logic synthesis tools, and automatic place and route tools. Advanced
 verification tools for functional abstraction and static timing
 analysis are part of the system.

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