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Re: Untagging by subtraction instead of masking on USE_LSB_TAG
From: |
YAMAMOTO Mitsuharu |
Subject: |
Re: Untagging by subtraction instead of masking on USE_LSB_TAG |
Date: |
Mon, 28 Jan 2008 14:02:51 +0900 |
User-agent: |
Wanderlust/2.14.0 (Africa) SEMI/1.14.6 (Maruoka) FLIM/1.14.8 (Shijō) APEL/10.6 Emacs/22.1 (sparc-sun-solaris2.8) MULE/5.0 (SAKAKI) |
>>>>> On Mon, 28 Jan 2008 13:25:30 +0900, Miles Bader <address@hidden> said:
> Miles Bader <address@hidden> writes:
>> Note that the important value here is the EA, not the offset.
>> Typically in a LSB tag scheme, the tags are arranged so that after
>> adding these "funny" offsets, the resulting EA is aligned properly.
> BTW, such a method won't work on architectures where offsets are
> inherently aligned -- for instance, doesn't the x86 implicitly scale
> the offset by the size of the value being loaded? Does anybody know
> what is usually done on such an architecture?
I'm not sure, but there might be. At least, the result on intel Mac
with gcc -Os was similar to that on PowerPC.
_cons_to_long: _cons_to_long:
pushl %ebp pushl %ebp
movl %esp, %ebp movl %esp, %ebp
movl 8(%ebp), %eax movl 8(%ebp), %eax
testb $7, %al testb $7, %al
jne L617 jne L617
sarl $3, %eax sarl $3, %eax
jmp L619 jmp L619
L617: L617:
andl $-8, %eax
movl (%eax), %ecx movl -5(%eax), %ecx
movl 4(%eax), %edx movl -1(%eax), %edx
movl %edx, %eax movl %edx, %eax
andl $7, %eax andl $7, %eax
cmpl $5, %eax cmpl $5, %eax
jne L620 jne L620
movl %edx, %eax
andl $-8, %eax
movl (%eax), %edx movl -5(%edx), %edx
L620: L620:
movl %ecx, %eax movl %ecx, %eax
sarl $3, %eax sarl $3, %eax
sall $16, %eax sall $16, %eax
sarl $3, %edx sarl $3, %edx
orl %edx, %eax orl %edx, %eax
L619: L619:
popl %ebp popl %ebp
ret ret
And Solaris/SPARC with gcc -Os:
cons_to_long: cons_to_long:
!#PROLOGUE# 0 !#PROLOGUE# 0
!#PROLOGUE# 1 !#PROLOGUE# 1
and %o0, -8, %o4 mov %o0, %o4
andcc %o0, 7, %g0 andcc %o0, 7, %g0
be .LL952 be .LL949
sra %o0, 3, %o0 sra %o0, 3, %o0
ld [%o4+4], %o5 ld [%o4-1], %o5
and %o5, 7, %g1 and %o5, 7, %g1
cmp %g1, 5 cmp %g1, 5
ld [%o4], %g1 ld [%o4-5], %g1
sra %g1, 3, %g1 sra %g1, 3, %g1
and %o5, -8, %o3
bne .LL954 bne .LL951
sll %g1, 16, %o0 sll %g1, 16, %o0
ld [%o3], %o5 ld [%o5-5], %o5
.LL954: .LL951:
sra %o5, 3, %g1 sra %o5, 3, %g1
or %o0, %g1, %o0 or %o0, %g1, %o0
.LL952: .LL949:
retl retl
nop nop
YAMAMOTO Mitsuharu
address@hidden