[dotgnu-pnet-commits] [SCM] DotGNU Portable.NET engine, compilers and tools (pnet) branch, master, updated. 60de7fe82155540ca8f4bb1102d462d2b9fe709b

[Klaus Treichel]

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- Log -----------------------------------------------------------------
http://git.savannah.gnu.org/cgit/pnet.git/commit/?id=60de7fe82155540ca8f4bb1102d462d2b9fe709b

commit 60de7fe82155540ca8f4bb1102d462d2b9fe709b
Author: Klaus Treichel <address@hidden>
Date:   Wed Apr 7 15:54:26 2010 +0200

    Add 32 bit support for unrolling COP_L2F and COP_LU2F cvm opcodes.
    Add support macros for int to float conversions and float array loads and
    stores for x86.

diff --git a/ChangeLog b/ChangeLog
index 23c4a59..10b5247 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -16,6 +16,10 @@
        32 bit and signed 64 bit integer values to floats.
        Add macros for loading and storing floatingpoint values from/to arrays.
 
+       * engine/md_x86.h: Add conversion macros from signed and unsigned
+       32 bit and signed 64 bit integer values to floats.
+       Add macros for loading and storing floatingpoint values from/to arrays.
+
        * engine/unroll.c (GetTopTwoWordAndFPRegisters): Function added for
        floatingpoint array stores.
 
diff --git a/engine/md_amd64.h b/engine/md_amd64.h
index 55c4b78..50c3297 100644
--- a/engine/md_amd64.h
+++ b/engine/md_amd64.h
@@ -529,7 +529,7 @@ extern md_inst_ptr _md_amd64_widen_byte(md_inst_ptr inst, 
int reg, int isSigned)
 
 /*
  * Convert a signed 64 bit value in the general register to a native
- * floating-point value an load it into the top fp register.
+ * floating-point value and load it into the top fp register.
  */
 #define        md_conv_sword_64_float(inst,dreg,sreg)  \
                        do { \
diff --git a/engine/md_x86.h b/engine/md_x86.h
index 3fce817..9d1d1df 100644
--- a/engine/md_x86.h
+++ b/engine/md_x86.h
@@ -507,6 +507,44 @@ extern md_inst_ptr _md_x86_widen_byte(md_inst_ptr inst, 
int reg, int isSigned);
                        } while (0)
 
 /*
+ * Convert a signed 32 bit value in the general register to a native
+ * floating-point value an load it into the top fp register.
+ */
+#define        md_conv_sword_32_float(inst,dreg,sreg)  \
+                       do { \
+                               x86_alu_reg_imm((inst), X86_SUB, X86_ESP, 4); \
+                               x86_mov_membase_reg((inst), X86_ESP, 0, (sreg), 
4); \
+                               x86_fild_membase((inst), X86_ESP, 0, 0); \
+                               x86_alu_reg_imm((inst), X86_ADD, X86_ESP, 4); \
+                       } while (0)
+
+/*
+ * Convert an unsigned 32 bit value in the general register to a native
+ * floating-point value an load it into the top fp register.
+ */
+#define        md_conv_uword_32_float(inst,dreg,sreg)  \
+                       do { \
+                               x86_alu_reg_imm((inst), X86_SUB, X86_ESP, 8); \
+                               x86_mov_membase_reg((inst), X86_ESP, 0, (sreg), 
4); \
+                               x86_mov_membase_imm((inst), X86_ESP, 4, 0, 4); \
+                               x86_fild_membase((inst), X86_ESP, 0, 1); \
+                               x86_alu_reg_imm((inst), X86_ADD, X86_ESP, 8); \
+                       } while (0)
+
+/*
+ * Convert a signed 64 bit value in the general register to a native
+ * floating-point value an load it into the top fp register.
+ */
+#define        md_conv_sword_64_float(inst,dreg,sregl,sregh)   \
+                       do { \
+                               x86_alu_reg_imm((inst), X86_SUB, X86_ESP, 8); \
+                               x86_mov_membase_reg((inst), X86_ESP, 0, 
(sregl), 4); \
+                               x86_mov_membase_reg((inst), X86_ESP, 4, 
(sregh), 4); \
+                               x86_fild_membase((inst), X86_ESP, 0, 1); \
+                               x86_alu_reg_imm((inst), X86_ADD, X86_ESP, 8); \
+                       } while (0)
+
+/*
  * Swap the top two items on the floating-point stack.
  */
 #define        md_freg_swap(inst)              x86_fxch((inst), 1)
@@ -780,6 +818,22 @@ extern md_inst_ptr _md_x86_compare
                        } while (0)
 
 /*
+ * Load a 32 bit floatingpoint value from an indexed array.
+ */
+#define        md_load_memindex_float_32(inst,reg,basereg,indexreg,disp) \
+                       do { \
+                               x86_fld_memindex((inst), (basereg), (disp), 
(indexreg), 0); \
+                       } while (0)
+
+/*
+ * Load a 64 bit floatingpoint value from an indexed array.
+ */
+#define        md_load_memindex_float_64(inst,reg,basereg,indexreg,disp) \
+                       do { \
+                               x86_fld_memindex((inst), (basereg), (disp), 
(indexreg), 1); \
+                       } while (0)
+
+/*
  * Store a 32-bit word value into an indexed array.
  */
 #define        md_store_memindex_word_32(inst,reg,basereg,indexreg,disp)       
\
@@ -837,6 +891,22 @@ extern md_inst_ptr _md_x86_mov_memindex_reg_byte
                        } while (0)
 
 /*
+ * Store a 32 bit floatingpoint value to an indexed array.
+ */
+#define        md_store_memindex_float_32(inst,reg,basereg,indexreg,disp) \
+                       do { \
+                               x86_fst_memindex((inst), (basereg), (disp), 
(indexreg), 0, 1); \
+                       } while (0)
+
+/*
+ * Store a 64 bit floatingpoint value to an indexed array.
+ */
+#define        md_store_memindex_float_64(inst,reg,basereg,indexreg,disp) \
+                       do { \
+                               x86_fst_memindex((inst), (basereg), (disp), 
(indexreg), 1, 1); \
+                       } while (0)
+
+/*
  * Absolute of a floatinpoint value
  */
 #define md_abs_reg_float(inst,reg) \
diff --git a/engine/unroll_conv.c b/engine/unroll_conv.c
index 857baf2..ca69d47 100644
--- a/engine/unroll_conv.c
+++ b/engine/unroll_conv.c
@@ -102,20 +102,32 @@ break;
 
 #ifdef md_conv_sword_64_float
 
-/*
- * TODO: Handle 32 bit archs.
- */
 case COP_L2F:
 {
        /* Read a float32 value from a pointer */
        UNROLL_START();
        CheckFPFull(&unroll);
+#ifdef IL_NATIVE_INT32
+       GetTopTwoWordRegisters(&unroll, &reg, &reg2,
+                                                  MD_REG1_32BIT | 
MD_REG2_32BIT);
+       reg3 = GetFPRegister(&unroll);
+#if MD_LITTLE_ENDIAN_LONGS
+       md_conv_sword_64_float(unroll.out, reg3, reg, reg2);
+#else
+       md_conv_sword_64_float(unroll.out, reg3, reg2, reg);
+#endif
+       FreeTopRegister(&unroll, -1);
+       FreeTopRegister(&unroll, -1);
+       FreeTopRegister(&unroll, -1),
+       PushRegister(&unroll, reg3, 0);
+#else
        reg = GetTopWordRegister(&unroll, MD_REG1_NATIVE);
        reg2 = GetFPRegister(&unroll);
        md_conv_sword_64_float(unroll.out, reg2, reg);
        FreeTopRegister(&unroll, -1);
        FreeTopRegister(&unroll, -1);
        PushRegister(&unroll, reg2, 0);
+#endif
        MODIFY_UNROLL_PC(CVM_LEN_NONE);
 }
 break;
@@ -124,20 +136,32 @@ break;
 
 #ifdef md_conv_uword_64_float
 
-/*
- * TODO: Handle 32 bit archs.
- */
 case COP_LU2F:
 {
        /* Read a float32 value from a pointer */
        UNROLL_START();
        CheckFPFull(&unroll);
+#ifdef IL_NATIVE_INT32
+       GetTopTwoWordRegisters(&unroll, &reg, &reg2,
+                                                  MD_REG1_32BIT | 
MD_REG2_32BIT);
+       reg3 = GetFPRegister(&unroll);
+#if MD_LITTLE_ENDIAN_LONGS
+       md_conv_uword_64_float(unroll.out, reg3, reg, reg2);
+#else
+       md_conv_uword_64_float(unroll.out, reg3, reg2, reg);
+#endif
+       FreeTopRegister(&unroll, -1);
+       FreeTopRegister(&unroll, -1);
+       FreeTopRegister(&unroll, -1),
+       PushRegister(&unroll, reg3, 0);
+#else
        reg = GetTopWordRegister(&unroll, MD_REG1_NATIVE);
        reg2 = GetFPRegister(&unroll);
        md_conv_uword_64_float(unroll.out, reg2, reg);
        FreeTopRegister(&unroll, -1);
        FreeTopRegister(&unroll, -1);
        PushRegister(&unroll, reg2, 0);
+#endif
        MODIFY_UNROLL_PC(CVM_LEN_NONE);
 }
 break;

-----------------------------------------------------------------------

Summary of changes:
 ChangeLog            |    4 +++
 engine/md_amd64.h    |    2 +-
 engine/md_x86.h      |   70 ++++++++++++++++++++++++++++++++++++++++++++++++++
 engine/unroll_conv.c |   36 +++++++++++++++++++++----
 4 files changed, 105 insertions(+), 7 deletions(-)


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