[dotgnu-pnet-commits] libjit ChangeLog jit/jit-rules-x86.ins

[Aleksey Demakov]

CVSROOT:        /sources/dotgnu-pnet
Module name:    libjit
Changes by:     Aleksey Demakov <avd>   08/04/20 08:10:47

Modified files:
        .              : ChangeLog 
        jit            : jit-rules-x86.ins 

Log message:
        fix LSIGN opcode and modify ISIGN opcode for symmetry

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/libjit/ChangeLog?cvsroot=dotgnu-pnet&r1=1.362&r2=1.363
http://cvs.savannah.gnu.org/viewcvs/libjit/jit/jit-rules-x86.ins?cvsroot=dotgnu-pnet&r1=1.35&r2=1.36

Patches:
Index: ChangeLog
===================================================================
RCS file: /sources/dotgnu-pnet/libjit/ChangeLog,v
retrieving revision 1.362
retrieving revision 1.363
diff -u -b -r1.362 -r1.363
--- ChangeLog   19 Apr 2008 13:48:50 -0000      1.362
+++ ChangeLog   20 Apr 2008 08:10:46 -0000      1.363
@@ -1,3 +1,8 @@
+2008-04-20  Aleksey Demakov  <address@hidden>
+
+       * jit/jit-rules-x86.ins: fix the sign opcode for longs (based on
+       a patch from Klaus) and slightly modify it for ints.
+
 2008-04-19  Klaus Treichel  <address@hidden>
 
        * jit/jit-insn.c (jit_insn_sign): the dest value of the sign insn

Index: jit/jit-rules-x86.ins
===================================================================
RCS file: /sources/dotgnu-pnet/libjit/jit/jit-rules-x86.ins,v
retrieving revision 1.35
retrieving revision 1.36
diff -u -b -r1.35 -r1.36
--- jit/jit-rules-x86.ins       31 Mar 2008 19:31:41 -0000      1.35
+++ jit/jit-rules-x86.ins       20 Apr 2008 08:10:46 -0000      1.36
@@ -1481,17 +1481,17 @@
                        x86_clear_reg(inst, $1);
                }
        }
-       [reg, scratch reg] -> {
-               x86_clear_reg(inst, $2);
-               x86_test_reg_reg(inst, $1, $1);
-               x86_set_reg(inst,X86_CC_GT, $2, 1);
-               x86_shift_reg_imm(inst, X86_SAR, $1, 31);
-               x86_alu_reg_reg(inst, X86_ADD, $1, $2);
+       [=+reg, +reg] -> {
+               x86_clear_reg(inst, $1);
+               x86_test_reg_reg(inst, $2, $2);
+               x86_set_reg(inst, X86_CC_NZ, $1, 0);
+               x86_shift_reg_imm(inst, X86_SAR, $2, 31);
+               x86_alu_reg_reg(inst, X86_OR, $1, $2);
        }
 
 JIT_OP_LSIGN:
        [=reg, imm] -> {
-               jit_int value = ((jit_int *)($2))[1];
+               jit_long value = *((jit_long *)($2));
                if(value < 0)
                {
                        x86_mov_reg_imm(inst, $1, -1);
@@ -1505,12 +1505,12 @@
                        x86_clear_reg(inst, $1);
                }
        }
-       [=reg, lreg] -> {
-               if($1 != %2)
-               {
-                       x86_mov_reg_reg(inst, $1, %2, 4);
-               }
-               x86_shift_reg_imm(inst, X86_SAR, $1, 31);
+       [=+reg, +lreg] -> {
+               x86_clear_reg(inst, $1);
+               x86_alu_reg_reg(inst, X86_OR, $2, %2);
+               x86_set_reg(inst, X86_CC_NZ, $1, 0);
+               x86_shift_reg_imm(inst, X86_SAR, %2, 31);
+               x86_alu_reg_reg(inst, X86_OR, $1, %2);
        }
 
 /*