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[dotgnu-pnet-commits] libjit ChangeLog jit/jit-rules-x86.ins
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From: |
Aleksey Demakov |
|
Subject: |
[dotgnu-pnet-commits] libjit ChangeLog jit/jit-rules-x86.ins |
|
Date: |
Sat, 04 Nov 2006 14:57:10 +0000 |
CVSROOT: /sources/dotgnu-pnet
Module name: libjit
Changes by: Aleksey Demakov <avd> 06/11/04 14:57:10
Modified files:
. : ChangeLog
jit : jit-rules-x86.ins
Log message:
make comparison opcodes use three-address patterns
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/libjit/ChangeLog?cvsroot=dotgnu-pnet&r1=1.277&r2=1.278
http://cvs.savannah.gnu.org/viewcvs/libjit/jit/jit-rules-x86.ins?cvsroot=dotgnu-pnet&r1=1.17&r2=1.18
Patches:
Index: ChangeLog
===================================================================
RCS file: /sources/dotgnu-pnet/libjit/ChangeLog,v
retrieving revision 1.277
retrieving revision 1.278
diff -u -b -r1.277 -r1.278
--- ChangeLog 1 Nov 2006 17:41:36 -0000 1.277
+++ ChangeLog 4 Nov 2006 14:57:10 -0000 1.278
@@ -1,3 +1,8 @@
+2006-11-04 Aleksey Demakov <address@hidden>
+
+ * jit/jit-rules-x86.ins: make comparison opcodes use three-address
+ patterns.
+
2006-11-01 Aleksey Demakov <address@hidden>
* jit/jit-reg-alloc.c (commit_input_value, commit_output_value):
Index: jit/jit-rules-x86.ins
===================================================================
RCS file: /sources/dotgnu-pnet/libjit/jit/jit-rules-x86.ins,v
retrieving revision 1.17
retrieving revision 1.18
diff -u -b -r1.17 -r1.18
--- jit/jit-rules-x86.ins 22 Oct 2006 23:51:41 -0000 1.17
+++ jit/jit-rules-x86.ins 4 Nov 2006 14:57:10 -0000 1.18
@@ -1069,151 +1069,151 @@
* Comparison opcodes.
*/
-JIT_OP_IEQ: binary
- [reg, immzero] -> {
- x86_alu_reg_reg(inst, X86_OR, $1, $1);
+JIT_OP_IEQ:
+ [=reg, reg, immzero] -> {
+ x86_alu_reg_reg(inst, X86_OR, $2, $2);
inst = setcc_reg(inst, $1, X86_CC_EQ, 0);
}
- [reg, imm] -> {
- x86_alu_reg_imm(inst, X86_CMP, $1, $2);
+ [=reg, reg, imm] -> {
+ x86_alu_reg_imm(inst, X86_CMP, $2, $3);
inst = setcc_reg(inst, $1, X86_CC_EQ, 0);
}
- [reg, local] -> {
- x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2);
+ [=reg, reg, local] -> {
+ x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);
inst = setcc_reg(inst, $1, X86_CC_EQ, 0);
}
- [reg, reg] -> {
- x86_alu_reg_reg(inst, X86_CMP, $1, $2);
+ [=reg, reg, reg] -> {
+ x86_alu_reg_reg(inst, X86_CMP, $2, $3);
inst = setcc_reg(inst, $1, X86_CC_EQ, 0);
}
-JIT_OP_INE: binary
- [reg, immzero] -> {
- x86_alu_reg_reg(inst, X86_OR, $1, $1);
+JIT_OP_INE:
+ [=reg, reg, immzero] -> {
+ x86_alu_reg_reg(inst, X86_OR, $2, $2);
inst = setcc_reg(inst, $1, X86_CC_NE, 0);
}
- [reg, imm] -> {
- x86_alu_reg_imm(inst, X86_CMP, $1, $2);
+ [=reg, reg, imm] -> {
+ x86_alu_reg_imm(inst, X86_CMP, $2, $3);
inst = setcc_reg(inst, $1, X86_CC_NE, 0);
}
- [reg, local] -> {
- x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2);
+ [=reg, reg, local] -> {
+ x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);
inst = setcc_reg(inst, $1, X86_CC_NE, 0);
}
- [reg, reg] -> {
- x86_alu_reg_reg(inst, X86_CMP, $1, $2);
+ [=reg, reg, reg] -> {
+ x86_alu_reg_reg(inst, X86_CMP, $2, $3);
inst = setcc_reg(inst, $1, X86_CC_NE, 0);
}
-JIT_OP_ILT: binary
- [reg, imm] -> {
- x86_alu_reg_imm(inst, X86_CMP, $1, $2);
+JIT_OP_ILT:
+ [=reg, reg, imm] -> {
+ x86_alu_reg_imm(inst, X86_CMP, $2, $3);
inst = setcc_reg(inst, $1, X86_CC_LT, 1);
}
- [reg, local] -> {
- x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2);
+ [=reg, reg, local] -> {
+ x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);
inst = setcc_reg(inst, $1, X86_CC_LT, 1);
}
- [reg, reg] -> {
- x86_alu_reg_reg(inst, X86_CMP, $1, $2);
+ [=reg, reg, reg] -> {
+ x86_alu_reg_reg(inst, X86_CMP, $2, $3);
inst = setcc_reg(inst, $1, X86_CC_LT, 1);
}
-JIT_OP_ILT_UN: binary
- [reg, imm] -> {
- x86_alu_reg_imm(inst, X86_CMP, $1, $2);
+JIT_OP_ILT_UN:
+ [=reg, reg, imm] -> {
+ x86_alu_reg_imm(inst, X86_CMP, $2, $3);
inst = setcc_reg(inst, $1, X86_CC_LT, 0);
}
- [reg, local] -> {
- x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2);
+ [=reg, reg, local] -> {
+ x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);
inst = setcc_reg(inst, $1, X86_CC_LT, 0);
}
- [reg, reg] -> {
- x86_alu_reg_reg(inst, X86_CMP, $1, $2);
+ [=reg, reg, reg] -> {
+ x86_alu_reg_reg(inst, X86_CMP, $2, $3);
inst = setcc_reg(inst, $1, X86_CC_LT, 0);
}
-JIT_OP_ILE: binary
- [reg, imm] -> {
- x86_alu_reg_imm(inst, X86_CMP, $1, $2);
+JIT_OP_ILE:
+ [=reg, reg, imm] -> {
+ x86_alu_reg_imm(inst, X86_CMP, $2, $3);
inst = setcc_reg(inst, $1, X86_CC_LE, 1);
}
- [reg, local] -> {
- x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2);
+ [=reg, reg, local] -> {
+ x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);
inst = setcc_reg(inst, $1, X86_CC_LE, 1);
}
- [reg, reg] -> {
- x86_alu_reg_reg(inst, X86_CMP, $1, $2);
+ [=reg, reg, reg] -> {
+ x86_alu_reg_reg(inst, X86_CMP, $2, $3);
inst = setcc_reg(inst, $1, X86_CC_LE, 1);
}
-JIT_OP_ILE_UN: binary
- [reg, imm] -> {
- x86_alu_reg_imm(inst, X86_CMP, $1, $2);
+JIT_OP_ILE_UN:
+ [=reg, reg, imm] -> {
+ x86_alu_reg_imm(inst, X86_CMP, $2, $3);
inst = setcc_reg(inst, $1, X86_CC_LE, 0);
}
- [reg, local] -> {
- x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2);
+ [=reg, reg, local] -> {
+ x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);
inst = setcc_reg(inst, $1, X86_CC_LE, 0);
}
- [reg, reg] -> {
- x86_alu_reg_reg(inst, X86_CMP, $1, $2);
+ [=reg, reg, reg] -> {
+ x86_alu_reg_reg(inst, X86_CMP, $2, $3);
inst = setcc_reg(inst, $1, X86_CC_LE, 0);
}
-JIT_OP_IGT: binary
- [reg, imm] -> {
- x86_alu_reg_imm(inst, X86_CMP, $1, $2);
+JIT_OP_IGT:
+ [=reg, reg, imm] -> {
+ x86_alu_reg_imm(inst, X86_CMP, $2, $3);
inst = setcc_reg(inst, $1, X86_CC_GT, 1);
}
- [reg, local] -> {
- x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2);
+ [=reg, reg, local] -> {
+ x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);
inst = setcc_reg(inst, $1, X86_CC_GT, 1);
}
- [reg, reg] -> {
- x86_alu_reg_reg(inst, X86_CMP, $1, $2);
+ [=reg, reg, reg] -> {
+ x86_alu_reg_reg(inst, X86_CMP, $2, $3);
inst = setcc_reg(inst, $1, X86_CC_GT, 1);
}
-JIT_OP_IGT_UN: binary
- [reg, imm] -> {
- x86_alu_reg_imm(inst, X86_CMP, $1, $2);
+JIT_OP_IGT_UN:
+ [=reg, reg, imm] -> {
+ x86_alu_reg_imm(inst, X86_CMP, $2, $3);
inst = setcc_reg(inst, $1, X86_CC_GT, 0);
}
- [reg, local] -> {
- x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2);
+ [=reg, reg, local] -> {
+ x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);
inst = setcc_reg(inst, $1, X86_CC_GT, 0);
}
- [reg, reg] -> {
- x86_alu_reg_reg(inst, X86_CMP, $1, $2);
+ [=reg, reg, reg] -> {
+ x86_alu_reg_reg(inst, X86_CMP, $2, $3);
inst = setcc_reg(inst, $1, X86_CC_GT, 0);
}
-JIT_OP_IGE: binary
- [reg, imm] -> {
- x86_alu_reg_imm(inst, X86_CMP, $1, $2);
+JIT_OP_IGE:
+ [=reg, reg, imm] -> {
+ x86_alu_reg_imm(inst, X86_CMP, $2, $3);
inst = setcc_reg(inst, $1, X86_CC_GE, 1);
}
- [reg, local] -> {
- x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2);
+ [=reg, reg, local] -> {
+ x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);
inst = setcc_reg(inst, $1, X86_CC_GE, 1);
}
- [reg, reg] -> {
- x86_alu_reg_reg(inst, X86_CMP, $1, $2);
+ [=reg, reg, reg] -> {
+ x86_alu_reg_reg(inst, X86_CMP, $2, $3);
inst = setcc_reg(inst, $1, X86_CC_GE, 1);
}
-JIT_OP_IGE_UN: binary
- [reg, imm] -> {
- x86_alu_reg_imm(inst, X86_CMP, $1, $2);
+JIT_OP_IGE_UN:
+ [=reg, reg, imm] -> {
+ x86_alu_reg_imm(inst, X86_CMP, $2, $3);
inst = setcc_reg(inst, $1, X86_CC_GE, 0);
}
- [reg, local] -> {
- x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2);
+ [=reg, reg, local] -> {
+ x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);
inst = setcc_reg(inst, $1, X86_CC_GE, 0);
}
- [reg, reg] -> {
- x86_alu_reg_reg(inst, X86_CMP, $1, $2);
+ [=reg, reg, reg] -> {
+ x86_alu_reg_reg(inst, X86_CMP, $2, $3);
inst = setcc_reg(inst, $1, X86_CC_GE, 0);
}
- [dotgnu-pnet-commits] libjit ChangeLog jit/jit-rules-x86.ins,
Aleksey Demakov <=