Thank you Steve. Now, I can set the power supply voltage for my VDD and set
the net names for the nets connected to my hybrid inverter in layout form
combined with Spice parts, and it creates a valid looking spice netlist with
everything connected as I expect. Now for the next question. Would I expect
the writing of the spice deck to also write the parisitic capacitances?
Perhaps in my naivety, I just dont quite understand yet. I was thinking that
the inverter itself would have some appreciable parasitic capacitance and
series poly resistance. Basically, the place I am trying to go is to
understand some of the relationships between geometry and speed. I have
spent some time reading a couple of books on layout and I can see some of
the relationships, but I am so far thwarted by my attempts to get them out
of the layout writing of the spice deck option.