Re: ERC check

[Steven Rubin]

> 1. ERC check must be used or can be ignored?

The ERC checks the substrates (well and select) which the DRC does not 
completely check.  Not only does ERC check the spacings on these layers, 
but it checks that there are appropriate contacts in each of the areas and 
reports other potentially useful information about them.

> 2. P-well and P-well between facets are too closed
> after tested under ERC. What is the best solution for
> this problem.

If there is a small gap, then you should run the p-well to the edge of the 
facets so that they form a single continuous area.  If this isn't possible, 
add "pure-layer nodes" of P-well at the higher level of hierarchy in the 
area where the facets interface.

> 3. ALS simulation for large circuit produces error but
> when I simulate the sub-circuit individually there was
> no error. I just want to know the capability of the
> simulator.

Although ALS is the only built-in simulator that is shipped with Electric, 
the IRSIM simulator is more accurate.  It is available as a free "extras" 
download from Static Free Software.  Tuukka Toivonen mentioned this, and he 
is right.  The current version works fine from the graphical interface.

   -Steven Rubin