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[Commit-gnuradio] r9907 - gnuradio/branches/developers/eb/cppdb-wip/gr-u
|
From: |
eb |
|
Subject: |
[Commit-gnuradio] r9907 - gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src |
|
Date: |
Sun, 2 Nov 2008 16:26:56 -0700 (MST) |
Author: eb
Date: 2008-11-02 16:26:56 -0700 (Sun, 02 Nov 2008)
New Revision: 9907
Added:
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp.i
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_sink_base.cc
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_sink_base.h
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_sink_c.cc
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_sink_c.h
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_sink_s.cc
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_sink_s.h
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_base.cc
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_base.h
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_c.cc
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_c.h
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_s.cc
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_s.h
Removed:
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1.i
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_sink_base.cc
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_sink_base.h
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_sink_c.cc
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_sink_c.h
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_sink_s.cc
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_sink_s.h
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_source_base.cc
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_source_base.h
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_source_c.cc
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_source_c.h
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_source_s.cc
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_source_s.h
Modified:
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/Makefile.am
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/qa_usrp.py
Log:
rename usrp1* to usrp*
Modified: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/Makefile.am
===================================================================
--- gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/Makefile.am
2008-11-02 23:07:05 UTC (rev 9906)
+++ gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/Makefile.am
2008-11-02 23:26:56 UTC (rev 9907)
@@ -32,7 +32,7 @@
TESTS = run_tests
LOCAL_IFILES = \
- $(top_srcdir)/gr-usrp/src/usrp1.i
+ $(top_srcdir)/gr-usrp/src/usrp.i
NON_LOCAL_IFILES = $(GNURADIO_I)
@@ -41,8 +41,8 @@
$(NON_LOCAL_IFILES)
BUILT_SOURCES = \
- usrp1.cc \
- usrp1.py
+ usrp_swig.cc \
+ usrp_swig.py
ourpython_PYTHON =
@@ -59,43 +59,42 @@
$(WITH_SWIG_INCLUDES)
grinclude_HEADERS = \
- usrp1_sink_base.h \
- usrp1_sink_c.h \
- usrp1_sink_s.h \
- usrp1_source_base.h \
- usrp1_source_c.h \
- usrp1_source_s.h
+ usrp_sink_base.h \
+ usrp_sink_c.h \
+ usrp_sink_s.h \
+ usrp_source_base.h \
+ usrp_source_c.h \
+ usrp_source_s.h
swiginclude_HEADERS = \
$(LOCAL_IFILES)
-ourlib_LTLIBRARIES = _usrp1.la
+ourlib_LTLIBRARIES = _usrp_swig.la
-_usrp1_la_SOURCES = \
- usrp1.cc \
- usrp1_sink_base.cc \
- usrp1_sink_c.cc \
- usrp1_sink_s.cc \
- usrp1_source_base.cc \
- usrp1_source_c.cc \
- usrp1_source_s.cc
+_usrp_swig_la_SOURCES = \
+ usrp_swig.cc \
+ usrp_sink_base.cc \
+ usrp_sink_c.cc \
+ usrp_sink_s.cc \
+ usrp_source_base.cc \
+ usrp_source_c.cc \
+ usrp_source_s.cc
-_usrp1_la_LIBADD = \
+_usrp_swig_la_LIBADD = \
$(PYTHON_LDFLAGS) \
$(GNURADIO_CORE_LA) \
- $(USRP_LA) \
- -lstdc++
+ $(USRP_LA)
-_usrp1_la_LDFLAGS = $(NO_UNDEFINED) -module -avoid-version
+_usrp_swig_la_LDFLAGS = $(NO_UNDEFINED) -module -avoid-version
-_usrp1_la_CXXFLAGS = @swig_CXXFLAGS@
+_usrp_swig_la_CXXFLAGS = @swig_CXXFLAGS@
-usrp1.cc usrp1.py: usrp1.i $(NON_LOCAL_IFILES) $(LOCAL_IFILES)
- $(SWIG) $(SWIGPYTHONARGS) -module usrp1 -o usrp1.cc $(LOCAL_IFILES)
+usrp_swig.cc usrp_swig.py: usrp.i $(NON_LOCAL_IFILES) $(LOCAL_IFILES)
+ $(SWIG) $(SWIGPYTHONARGS) -module usrp_swig -o usrp_swig.cc
$(LOCAL_IFILES)
noinst_PYTHON = \
Modified: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/qa_usrp.py
===================================================================
--- gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/qa_usrp.py
2008-11-02 23:07:05 UTC (rev 9906)
+++ gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/qa_usrp.py
2008-11-02 23:26:56 UTC (rev 9907)
@@ -21,7 +21,7 @@
#
from gnuradio import gr, gr_unittest
-import usrp
+import usrp_swig
class qa_usrp (gr_unittest.TestCase):
Copied: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp.i (from rev
9906, gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1.i)
===================================================================
--- gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp.i
(rev 0)
+++ gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp.i
2008-11-02 23:26:56 UTC (rev 9907)
@@ -0,0 +1,657 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2004 Free Software Foundation, Inc.
+ *
+ * This file is part of GNU Radio
+ *
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ *
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with GNU Radio; see the file COPYING. If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+%feature("autodoc", "1"); // generate python docstrings
+
+%include "exception.i"
+%import "gnuradio.i" // the common stuff
+
+%{
+
+#include "gnuradio_swig_bug_workaround.h" // mandatory bug fix
+#include "usrp_sink_c.h"
+#include "usrp_sink_s.h"
+#include "usrp_source_c.h"
+#include "usrp_source_s.h"
+#include <stdexcept>
+#include <usrp_standard.h>
+#include <usrp_spi_defs.h>
+%}
+
+%include <usrp_spi_defs.h>
+
+%constant int FPGA_MODE_NORMAL = usrp_standard_rx::FPGA_MODE_NORMAL;
+%constant int FPGA_MODE_LOOPBACK = usrp_standard_rx::FPGA_MODE_LOOPBACK;
+%constant int FPGA_MODE_COUNTING = usrp_standard_rx::FPGA_MODE_COUNTING;
+
+// ================================================================
+// abstract classes
+// ================================================================
+
+class usrp_sink_base : public gr_sync_block {
+protected:
+ usrp_sink_base (const std::string &name,
+ gr_io_signature_sptr input_signature,
+ int which_board,
+ unsigned int interp_rate,
+ int nchan,
+ int mux,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error);
+
+ virtual void copy_to_usrp_buffer (gr_vector_const_void_star &input_items,
+ int input_index,
+ int input_items_available,
+ int &input_items_consumed,
+ void *usrp_buffer,
+ int usrp_buffer_length,
+ int &bytes_written) = 0;
+ public:
+ ~usrp_sink_base ();
+
+ /*!
+ * \brief Set interpolator rate. \p rate must be in [4, 1024] and a
multiple of 4.
+ *
+ * The final complex sample rate across the USB is
+ * dac_freq () * nchannels () / interp_rate ()
+ */
+ bool set_interp_rate (unsigned int rate);
+ bool set_nchannels (int nchan);
+ bool set_mux (int mux);
+
+ /*!
+ * \brief set the frequency of the digital up converter.
+ *
+ * \p channel must be 0 or 1. \p freq is the center frequency in Hz.
+ * It must be in the range [-44M, 44M]. The frequency specified is
+ * quantized. Use tx_freq to retrieve the actual value used.
+ */
+ bool set_tx_freq (int channel, double freq);
+
+ void set_verbose (bool verbose);
+
+ // ACCESSORS
+
+ long fpga_master_clock_freq() const;
+ long converter_rate() const; // D/A sample rate
+ long dac_rate() const; // alias
+ long dac_freq () const; // deprecated name. Use converter_rate()
or dac_rate().
+
+ unsigned int interp_rate () const;
+ double tx_freq (int channel) const;
+ int nunderruns () const { return d_nunderruns; }
+
+ /*!
+ * \brief Set Programmable Gain Amplifier (PGA)
+ *
+ * \param which which D/A [0,3]
+ * \param gain_in_db gain value (linear in dB)
+ *
+ * gain is rounded to closest setting supported by hardware.
+ * Note that DAC 0 and DAC 1 share a gain setting as do DAC 2 and DAC 3.
+ * Setting DAC 0 affects DAC 1 and vice versa. Same with DAC 2 and DAC 3.
+ *
+ * \returns true iff sucessful.
+ *
+ * \sa pga_min(), pga_max(), pga_db_per_step()
+ */
+ bool set_pga (int which, double gain_in_db);
+
+ /*!
+ * \brief Return programmable gain amplifier gain in dB.
+ *
+ * \param which which D/A [0,3]
+ */
+ double pga (int which) const;
+
+ /*!
+ * \brief Return minimum legal PGA gain in dB.
+ */
+ double pga_min () const;
+
+ /*!
+ * \brief Return maximum legal PGA gain in dB.
+ */
+ double pga_max () const;
+
+ /*!
+ * \brief Return hardware step size of PGA (linear in dB).
+ */
+ double pga_db_per_step () const;
+
+ /*!
+ * \brief Return daughterboard ID for given Tx daughterboard slot [0,1].
+ *
+ * \return daughterboard id >= 0 if successful
+ * \return -1 if no daugherboard
+ * \return -2 if invalid EEPROM on daughterboard
+ */
+ int daughterboard_id (int which_dboard) const;
+
+ /*!
+ * \brief Set ADC offset correction
+ * \param which which ADC[0,3]: 0 = RX_A I, 1 = RX_A Q...
+ * \param offset 16-bit value to subtract from raw ADC input.
+ */
+ bool set_adc_offset (int which, int offset);
+
+ /*!
+ * \brief Set DAC offset correction
+ * \param which which DAC[0,3]: 0 = TX_A I, 1 = TX_A Q...
+ * \param offset 10-bit offset value (ambiguous format: See AD9862
datasheet).
+ * \param offset_pin 1-bit value. If 0 offset applied to -ve differential
pin;
+ * If 1 offset applied to +ve differential
pin.
+ */
+ bool set_dac_offset (int which, int offset, int offset_pin);
+
+ /*!
+ * \brief Control ADC input buffer
+ * \param which which ADC[0,3]
+ * \param bypass if non-zero, bypass input buffer and connect input
+ * directly to switched cap SHA input of RxPGA.
+ */
+ bool set_adc_buffer_bypass (int which, bool bypass);
+
+ /*!
+ * \brief return the usrp's serial number.
+ *
+ * \returns non-zero length string iff successful.
+ */
+ std::string serial_number();
+
+ /*!
+ * \brief Write direction register (output enables) for pins that go to
daughterboard.
+ *
+ * \param which_dboard [0,1] which d'board
+ * \param value value to write into register
+ * \param mask which bits of value to write into reg
+ *
+ * Each d'board has 16-bits of general purpose i/o.
+ * Setting the bit makes it an output from the FPGA to the d'board.
+ *
+ * This register is initialized based on a value stored in the
+ * d'board EEPROM. In general, you shouldn't be using this routine
+ * without a very good reason. Using this method incorrectly will
+ * kill your USRP motherboard and/or daughterboard.
+ */
+ bool _write_oe (int which_dboard, int value, int mask);
+
+ /*!
+ * \brief Write daughterboard i/o pin value
+ *
+ * \param which_dboard [0,1] which d'board
+ * \param value value to write into register
+ * \param mask which bits of value to write into reg
+ */
+ bool write_io (int which_dboard, int value, int mask);
+
+ /*!
+ * \brief Read daughterboard i/o pin value
+ *
+ * \param which_dboard [0,1] which d'board
+ * \returns register value if successful, else READ_FAILED
+ */
+ int read_io (int which_dboard);
+
+ bool write_aux_dac (int which_dboard, int which_dac, int value);
+ int read_aux_adc (int which_dboard, int which_adc);
+ bool write_eeprom (int i2c_addr, int eeprom_offset, const std::string buf);
+ std::string read_eeprom (int i2c_addr, int eeprom_offset, int len);
+ bool write_i2c (int i2c_addr, const std::string buf);
+ std::string read_i2c (int i2c_addr, int len);
+
+ bool _write_fpga_reg (int regno, int value); //< 7-bit regno, 32-bit value
+ int _read_fpga_reg (int regno);
+ bool _write_9862 (int which_codec, int regno, unsigned char value);
+ int _read_9862 (int which_codec, int regno) const;
+
+ /*!
+ * \brief Write data to SPI bus peripheral.
+ *
+ * \param optional_header 0,1 or 2 bytes to write before buf.
+ * \param enables bitmask of peripherals to write. See
usrp_spi_defs.h
+ * \param format transaction format. See usrp_spi_defs.h
SPI_FMT_*
+ * \param buf the data to write
+ * \returns true iff successful
+ * Writes are limited to a maximum of 64 bytes.
+ *
+ * If \p format specifies that optional_header bytes are present, they are
+ * written to the peripheral immediately prior to writing \p buf.
+ */
+ bool _write_spi (int optional_header, int enables, int format, std::string
buf);
+
+ /*
+ * \brief Read data from SPI bus peripheral.
+ *
+ * \param optional_header 0,1 or 2 bytes to write before buf.
+ * \param enables bitmask of peripheral to read. See
usrp_spi_defs.h
+ * \param format transaction format. See usrp_spi_defs.h
SPI_FMT_*
+ * \param len number of bytes to read. Must be in
[0,64].
+ * \returns the data read if sucessful, else a zero length string.
+ *
+ * Reads are limited to a maximum of 64 bytes.
+ *
+ * If \p format specifies that optional_header bytes are present, they
+ * are written to the peripheral first. Then \p len bytes are read from
+ * the peripheral and returned.
+ */
+ std::string _read_spi (int optional_header, int enables, int format, int
len);
+};
+
+// ----------------------------------------------------------------
+
+class usrp_source_base : public gr_sync_block {
+ protected:
+
+ usrp_source_base (const std::string &name,
+ gr_io_signature_sptr input_signature,
+ int which_board,
+ unsigned int interp_rate,
+ int nchan,
+ int mux,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error);
+
+ virtual int ninput_bytes_reqd_for_noutput_items (int noutput_items) = 0;
+
+ virtual void copy_from_usrp_buffer (gr_vector_void_star &output_items,
+ int output_index,
+ int output_items_available,
+ int &output_items_produced,
+ const void *usrp_buffer,
+ int usrp_buffer_length,
+ int &bytes_read) = 0;
+ public:
+ ~usrp_source_base ();
+
+
+ /*!
+ * \brief Set decimator rate. \p rate must be EVEN and in [8, 256].
+ *
+ * The final complex sample rate across the USB is
+ * adc_freq () / decim_rate ()
+ */
+ bool set_decim_rate (unsigned int rate);
+ bool set_nchannels (int nchan);
+ bool set_mux (int mux);
+
+ /*!
+ * \brief set the center frequency of the digital down converter.
+ *
+ * \p channel must be 0. \p freq is the center frequency in Hz.
+ * It must be in the range [-FIXME, FIXME]. The frequency specified is
+ * quantized. Use rx_freq to retrieve the actual value used.
+ */
+ bool set_rx_freq (int channel, double freq);
+
+ /*!
+ * \brief set fpga special modes
+ */
+ bool set_fpga_mode (int mode);
+
+ /*!
+ * \brief Set the digital down converter phase register.
+ *
+ * \param channel which ddc channel [0, 3]
+ * \param phase 32-bit integer phase value.
+ */
+ bool set_ddc_phase(int channel, int phase);
+
+
+ void set_verbose (bool verbose);
+
+ // ACCESSORS
+
+ long fpga_master_clock_freq() const;
+ long converter_rate() const; // A/D sample rate
+ long adc_rate() const; // alias
+ long adc_freq() const; // Deprecated name. Use converter_rate() or
adc_rate().
+
+ unsigned int decim_rate () const;
+ double rx_freq (int channel) const;
+ int noverruns () const { return d_noverruns; }
+
+
+ // PGA stuff
+ /*!
+ * \brief Set Programmable Gain Amplifier (PGA)
+ *
+ * \param which which A/D [0,3]
+ * \param gain_in_db gain value (linear in dB)
+ *
+ * gain is rounded to closest setting supported by hardware.
+ *
+ * \returns true iff sucessful.
+ *
+ * \sa pga_min(), pga_max(), pga_db_per_step()
+ */
+ bool set_pga (int which, double gain_in_db);
+
+ /*!
+ * \brief Return programmable gain amplifier gain setting in dB.
+ *
+ * \param which which A/D [0,3]
+ */
+ double pga (int which) const;
+
+ /*!
+ * \brief Return minimum legal PGA setting in dB.
+ */
+ double pga_min () const;
+
+ /*!
+ * \brief Return maximum legal PGA setting in dB.
+ */
+ double pga_max () const;
+
+ /*!
+ * \brief Return hardware step size of PGA (linear in dB).
+ */
+ double pga_db_per_step () const;
+
+ /*!
+ * \brief Return daughterboard ID for given Rx daughterboard slot [0,1].
+ *
+ * \return daughterboard id >= 0 if successful
+ * \return -1 if no daugherboard
+ * \return -2 if invalid EEPROM on daughterboard
+ */
+ int daughterboard_id (int which_dboard) const;
+
+ /*!
+ * \brief Set ADC offset correction
+ * \param which which ADC[0,3]: 0 = RX_A I, 1 = RX_A Q...
+ * \param offset 16-bit value to subtract from raw ADC input.
+ */
+ bool set_adc_offset (int which, int offset);
+
+ /*!
+ * \brief Set DAC offset correction
+ * \param which which DAC[0,3]: 0 = TX_A I, 1 = TX_A Q...
+ * \param offset 10-bit offset value (ambiguous format: See AD9862
datasheet).
+ * \param offset_pin 1-bit value. If 0 offset applied to -ve differential
pin;
+ * If 1 offset applied to +ve differential
pin.
+ */
+ bool set_dac_offset (int which, int offset, int offset_pin);
+
+ /*!
+ * \brief Control ADC input buffer
+ * \param which which ADC[0,3]
+ * \param bypass if non-zero, bypass input buffer and connect input
+ * directly to switched cap SHA input of RxPGA.
+ */
+ bool set_adc_buffer_bypass (int which, bool bypass);
+
+ /*!
+ * \brief return the usrp's serial number.
+ *
+ * \returns non-zero length string iff successful.
+ */
+ std::string serial_number();
+
+ /*!
+ * \brief Write direction register (output enables) for pins that go to
daughterboard.
+ *
+ * \param which_dboard [0,1] which d'board
+ * \param value value to write into register
+ * \param mask which bits of value to write into reg
+ *
+ * Each d'board has 16-bits of general purpose i/o.
+ * Setting the bit makes it an output from the FPGA to the d'board.
+ *
+ * This register is initialized based on a value stored in the
+ * d'board EEPROM. In general, you shouldn't be using this routine
+ * without a very good reason. Using this method incorrectly will
+ * kill your USRP motherboard and/or daughterboard.
+ */
+ bool _write_oe (int which_dboard, int value, int mask);
+
+ /*!
+ * \brief Write daughterboard i/o pin value
+ *
+ * \param which_dboard [0,1] which d'board
+ * \param value value to write into register
+ * \param mask which bits of value to write into reg
+ */
+ bool write_io (int which_dboard, int value, int mask);
+
+ /*!
+ * \brief Read daughterboard i/o pin value
+ *
+ * \param which_dboard [0,1] which d'board
+ * \returns register value if successful, else READ_FAILED
+ */
+ int read_io (int which_dboard);
+
+ /*!
+ * \brief Enable/disable automatic DC offset removal control loop in FPGA
+ *
+ * \param bits which control loops to enable
+ * \param mask which \p bits to pay attention to
+ *
+ * If the corresponding bit is set, enable the automatic DC
+ * offset correction control loop.
+ *
+ * <pre>
+ * The 4 low bits are significant:
+ *
+ * ADC0 = (1 << 0)
+ * ADC1 = (1 << 1)
+ * ADC2 = (1 << 2)
+ * ADC3 = (1 << 3)
+ * </pre>
+ *
+ * By default the control loop is enabled on all ADC's.
+ */
+ bool set_dc_offset_cl_enable(int bits, int mask);
+
+ /*!
+ * \brief Specify Rx data format.
+ *
+ * \param format format specifier
+ *
+ * Rx data format control register
+ *
+ * 3 2 1
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * +-----------------------------------------+-+-+---------+-------+
+ * | Reserved (Must be zero) |B|Q| WIDTH | SHIFT |
+ * +-----------------------------------------+-+-+---------+-------+
+ *
+ * SHIFT specifies arithmetic right shift [0, 15]
+ * WIDTH specifies bit-width of I & Q samples across the USB [1, 16] (not
all valid)
+ * Q if set deliver both I & Q, else just I
+ * B if set bypass half-band filter.
+ *
+ * Right now the acceptable values are:
+ *
+ * B Q WIDTH SHIFT
+ * 0 1 16 0
+ * 0 1 8 8
+ *
+ * More valid combos to come.
+ *
+ * Default value is 0x00000300 16-bits, 0 shift, deliver both I & Q.
+ */
+ bool set_format(unsigned int format);
+
+ /*!
+ * \brief return current format
+ */
+ unsigned int format () const;
+
+ static unsigned int make_format(int width=16, int shift=0,
+ bool want_q=true, bool bypass_halfband=false);
+ static int format_width(unsigned int format);
+ static int format_shift(unsigned int format);
+ static bool format_want_q(unsigned int format);
+ static bool format_bypass_halfband(unsigned int format);
+
+
+
+
+ bool write_aux_dac (int which_dboard, int which_dac, int value);
+ int read_aux_adc (int which_dboard, int which_adc);
+ bool write_eeprom (int i2c_addr, int eeprom_offset, const std::string buf);
+ std::string read_eeprom (int i2c_addr, int eeprom_offset, int len);
+ bool write_i2c (int i2c_addr, const std::string buf);
+ std::string read_i2c (int i2c_addr, int len);
+ bool _write_fpga_reg (int regno, int value); //< 7-bit regno, 32-bit value
+ bool _write_fpga_reg_masked (int regno, int value, int mask); //< 7-bit
regno, 16-bit value, 16-bit mask
+ int _read_fpga_reg (int regno);
+ bool _write_9862 (int which_codec, int regno, unsigned char value);
+ int _read_9862 (int which_codec, int regno) const;
+
+ bool _write_spi (int optional_header, int enables, int format, std::string
buf);
+
+ /*
+ * \brief Read data from SPI bus peripheral.
+ *
+ * \param optional_header 0,1 or 2 bytes to write before buf.
+ * \param enables bitmask of peripheral to read. See
usrp_spi_defs.h
+ * \param format transaction format. See usrp_spi_defs.h
SPI_FMT_*
+ * \param len number of bytes to read. Must be in
[0,64].
+ * \returns the data read if sucessful, else a zero length string.
+ *
+ * Reads are limited to a maximum of 64 bytes.
+ *
+ * If \p format specifies that optional_header bytes are present, they
+ * are written to the peripheral first. Then \p len bytes are read from
+ * the peripheral and returned.
+ */
+ std::string _read_spi (int optional_header, int enables, int format, int
len);
+};
+
+
+// ================================================================
+// concrete sinks
+// ================================================================
+
+
+GR_SWIG_BLOCK_MAGIC(usrp,sink_c)
+
+usrp_sink_c_sptr
+usrp_make_sink_c (int which_board,
+ unsigned int interp_rate,
+ int nchan,
+ int mux,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error);
+
+
+class usrp_sink_c : public usrp_sink_base {
+ protected:
+ usrp_sink_c (int which_board, unsigned int interp_rate,
+ int nchan, int mux);
+
+ public:
+ ~usrp_sink_c ();
+};
+
+// ----------------------------------------------------------------
+
+GR_SWIG_BLOCK_MAGIC(usrp,sink_s)
+
+usrp_sink_s_sptr
+usrp_make_sink_s (int which_board,
+ unsigned int interp_rate,
+ int nchan,
+ int mux,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error);
+
+
+class usrp_sink_s : public usrp_sink_base {
+ protected:
+ usrp_sink_s (int which_board, unsigned int interp_rate,
+ int nchan, int mux);
+
+ public:
+ ~usrp_sink_s ();
+};
+
+// ================================================================
+// concrete sources
+// ================================================================
+
+GR_SWIG_BLOCK_MAGIC(usrp,source_c)
+
+
+usrp_source_c_sptr
+usrp_make_source_c (int which_board,
+ unsigned int decim_rate,
+ int nchan,
+ int mux,
+ int mode,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error);
+
+class usrp_source_c : public usrp_source_base {
+ protected:
+ usrp_source_c (int which_board, unsigned int decim_rate,
+ int nchan, int mux, int mode);
+
+ public:
+ ~usrp_source_c ();
+};
+
+// ----------------------------------------------------------------
+
+GR_SWIG_BLOCK_MAGIC(usrp,source_s)
+
+usrp_source_s_sptr
+usrp_make_source_s (int which_board,
+ unsigned int decim_rate,
+ int nchan,
+ int mux,
+ int mode,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error);
+
+
+class usrp_source_s : public usrp_source_base {
+ protected:
+ usrp_source_s (int which_board, unsigned int decim_rate,
+ int nchan, int mux, int mode);
+
+ public:
+ ~usrp_source_s ();
+};
+
Deleted: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1.i
Deleted:
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_sink_base.cc
Deleted: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_sink_base.h
Deleted: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_sink_c.cc
Deleted: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_sink_c.h
Deleted: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_sink_s.cc
Deleted: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_sink_s.h
Deleted:
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_source_base.cc
Deleted:
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_source_base.h
Deleted: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_source_c.cc
Deleted: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_source_c.h
Deleted: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_source_s.cc
Deleted: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_source_s.h
Copied: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_sink_base.cc
(from rev 9905,
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_sink_base.cc)
===================================================================
--- gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_sink_base.cc
(rev 0)
+++ gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_sink_base.cc
2008-11-02 23:26:56 UTC (rev 9907)
@@ -0,0 +1,359 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2004 Free Software Foundation, Inc.
+ *
+ * This file is part of GNU Radio
+ *
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ *
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with GNU Radio; see the file COPYING. If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <usrp_sink_base.h>
+#include <gr_io_signature.h>
+#include <usrp_standard.h>
+#include <assert.h>
+
+static const int OUTPUT_MULTIPLE_SAMPLES = 128; // DON'T CHANGE
THIS VALUE!
+
+usrp_sink_base::usrp_sink_base (const std::string &name,
+ gr_io_signature_sptr input_signature,
+ int which_board,
+ unsigned int interp_rate,
+ int nchan,
+ int mux,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error)
+ : gr_sync_block (name,
+ input_signature,
+ gr_make_io_signature (0, 0, 0)),
+ d_nunderruns (0)
+{
+ d_usrp = usrp_standard_tx::make (which_board,
+ interp_rate,
+ nchan, mux,
+ fusb_block_size,
+ fusb_nblocks,
+ fpga_filename,
+ firmware_filename
+ );
+ if (d_usrp == 0)
+ throw std::runtime_error ("can't open usrp");
+
+ // All calls to d_usrp->write must be multiples of 512 bytes.
+
+ set_output_multiple (OUTPUT_MULTIPLE_SAMPLES);
+}
+
+usrp_sink_base::~usrp_sink_base ()
+{
+ delete d_usrp;
+}
+
+bool
+usrp_sink_base::start()
+{
+ return d_usrp->start();
+}
+
+bool
+usrp_sink_base::stop()
+{
+ return d_usrp->stop();
+}
+
+int
+usrp_sink_base::work (int noutput_items,
+ gr_vector_const_void_star &input_items,
+ gr_vector_void_star &output_items)
+{
+ static const int BUFSIZE = 16 * (1L << 10); // 16kB
+ unsigned char outbuf[BUFSIZE];
+ int obi = 0;
+ int input_index = 0;
+ int input_items_consumed;
+ int bytes_written;
+ bool underrun;
+
+
+ while (input_index < noutput_items){
+
+ copy_to_usrp_buffer (input_items,
+ input_index,
+ noutput_items - input_index, // input_items_available
+ input_items_consumed, // [out]
+ &outbuf[obi], // [out] usrp_buffer
+ BUFSIZE - obi, // usrp_buffer_length
+ bytes_written); // [out]
+
+ assert (input_index + input_items_consumed <= noutput_items);
+ assert (obi + bytes_written <= BUFSIZE);
+
+ input_index += input_items_consumed;
+ obi += bytes_written;
+
+ if (obi >= BUFSIZE){ // flush
+ if (d_usrp->write (outbuf, obi, &underrun) != obi)
+ return -1; // indicate we're done
+
+ if (underrun){
+ d_nunderruns++;
+ // fprintf (stderr, "usrp_sink: underrun\n");
+ fputs ("uU", stderr);
+ }
+ obi = 0;
+ }
+ }
+
+ if (obi != 0){
+ assert (obi % 512 == 0);
+ if (d_usrp->write (outbuf, obi, &underrun) != obi)
+ return -1; // indicate we're done
+
+ if (underrun){
+ d_nunderruns++;
+ // fprintf (stderr, "usrp_sink: underrun\n");
+ fputs ("uU", stderr);
+ }
+ }
+
+ return noutput_items;
+}
+
+bool
+usrp_sink_base::set_interp_rate (unsigned int rate)
+{
+ return d_usrp->set_interp_rate (rate);
+}
+
+bool
+usrp_sink_base::set_nchannels (int nchan)
+{
+ return d_usrp->set_nchannels (nchan);
+}
+
+bool
+usrp_sink_base::set_mux (int mux)
+{
+ return d_usrp->set_mux (mux);
+}
+
+bool
+usrp_sink_base::set_tx_freq (int channel, double freq)
+{
+ return d_usrp->set_tx_freq (channel, freq);
+}
+
+long
+usrp_sink_base::fpga_master_clock_freq() const
+{
+ return d_usrp->fpga_master_clock_freq();
+}
+
+long
+usrp_sink_base::converter_rate () const
+{
+ return d_usrp->converter_rate ();
+}
+
+unsigned int
+usrp_sink_base::interp_rate () const
+{
+ return d_usrp->interp_rate ();
+}
+
+int
+usrp_sink_base::nchannels () const
+{
+ return d_usrp->nchannels ();
+}
+
+int
+usrp_sink_base::mux () const
+{
+ return d_usrp->mux ();
+}
+
+
+double
+usrp_sink_base::tx_freq (int channel) const
+{
+ return d_usrp->tx_freq (channel);
+}
+
+void
+usrp_sink_base::set_verbose (bool verbose)
+{
+ d_usrp->set_verbose (verbose);
+}
+
+bool
+usrp_sink_base::write_aux_dac (int which_dboard, int which_dac, int value)
+{
+ return d_usrp->write_aux_dac (which_dboard, which_dac, value);
+}
+
+int
+usrp_sink_base::read_aux_adc (int which_dboard, int which_adc)
+{
+ return d_usrp->read_aux_adc (which_dboard, which_adc);
+}
+
+bool
+usrp_sink_base::write_eeprom (int i2c_addr, int eeprom_offset, const
std::string buf)
+{
+ return d_usrp->write_eeprom (i2c_addr, eeprom_offset, buf);
+}
+
+std::string
+usrp_sink_base::read_eeprom (int i2c_addr, int eeprom_offset, int len)
+{
+ return d_usrp->read_eeprom (i2c_addr, eeprom_offset, len);
+}
+
+bool
+usrp_sink_base::write_i2c (int i2c_addr, const std::string buf)
+{
+ return d_usrp->write_i2c (i2c_addr, buf);
+}
+
+std::string
+usrp_sink_base::read_i2c (int i2c_addr, int len)
+{
+ return d_usrp->read_i2c (i2c_addr, len);
+}
+
+bool
+usrp_sink_base::set_pga (int which, double gain)
+{
+ return d_usrp->set_pga (which, gain);
+}
+
+double
+usrp_sink_base::pga (int which) const
+{
+ return d_usrp->pga (which);
+}
+
+double
+usrp_sink_base::pga_min () const
+{
+ return d_usrp->pga_min ();
+}
+
+double
+usrp_sink_base::pga_max () const
+{
+ return d_usrp->pga_max ();
+}
+
+double
+usrp_sink_base::pga_db_per_step () const
+{
+ return d_usrp->pga_db_per_step ();
+}
+
+int
+usrp_sink_base::daughterboard_id (int which) const
+{
+ return d_usrp->daughterboard_id (which);
+}
+
+bool
+usrp_sink_base::set_adc_offset (int which, int offset)
+{
+ return d_usrp->set_adc_offset (which, offset);
+}
+
+bool
+usrp_sink_base::set_dac_offset (int which, int offset, int offset_pin)
+{
+ return d_usrp->set_dac_offset (which, offset, offset_pin);
+}
+
+bool
+usrp_sink_base::set_adc_buffer_bypass (int which, bool bypass)
+{
+ return d_usrp->set_adc_buffer_bypass (which, bypass);
+}
+
+std::string
+usrp_sink_base::serial_number()
+{
+ return d_usrp->serial_number();
+}
+
+bool
+usrp_sink_base::_write_oe (int which_dboard, int value, int mask)
+{
+ return d_usrp->_write_oe (which_dboard, value, mask);
+}
+
+bool
+usrp_sink_base::write_io (int which_dboard, int value, int mask)
+{
+ return d_usrp->write_io (which_dboard, value, mask);
+}
+
+int
+usrp_sink_base::read_io (int which_dboard)
+{
+ return d_usrp->read_io (which_dboard);
+}
+
+// internal routines...
+
+bool
+usrp_sink_base::_write_fpga_reg (int regno, int value)
+{
+ return d_usrp->_write_fpga_reg (regno, value);
+}
+
+int
+usrp_sink_base::_read_fpga_reg (int regno)
+{
+ return d_usrp->_read_fpga_reg (regno);
+}
+
+bool
+usrp_sink_base::_write_9862 (int which_codec, int regno, unsigned char value)
+{
+ return d_usrp->_write_9862 (which_codec, regno, value);
+}
+
+int
+usrp_sink_base::_read_9862 (int which_codec, int regno) const
+{
+ return d_usrp->_read_9862 (which_codec, regno);
+}
+
+bool
+usrp_sink_base::_write_spi (int optional_header, int enables,
+ int format, std::string buf)
+{
+ return d_usrp->_write_spi (optional_header, enables, format, buf);
+}
+
+std::string
+usrp_sink_base::_read_spi (int optional_header, int enables, int format, int
len)
+{
+ return d_usrp->_read_spi (optional_header, enables, format, len);
+}
Copied: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_sink_base.h
(from rev 9905,
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_sink_base.h)
===================================================================
--- gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_sink_base.h
(rev 0)
+++ gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_sink_base.h
2008-11-02 23:26:56 UTC (rev 9907)
@@ -0,0 +1,359 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2004,2006 Free Software Foundation, Inc.
+ *
+ * This file is part of GNU Radio
+ *
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ *
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with GNU Radio; see the file COPYING. If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#ifndef INCLUDED_USRP1_SINK_BASE_H
+#define INCLUDED_USRP1_SINK_BASE_H
+
+#include <gr_sync_block.h>
+#include <stdexcept>
+
+class usrp_standard_tx;
+
+
+/*!
+ * \brief abstract interface to Universal Software Radio Peripheral Tx path
(Rev 1)
+ */
+class usrp_sink_base : public gr_sync_block {
+ private:
+ usrp_standard_tx *d_usrp;
+ int d_nunderruns;
+
+ protected:
+ usrp_sink_base (const std::string &name,
+ gr_io_signature_sptr input_signature,
+ int which_board,
+ unsigned int interp_rate,
+ int nchan,
+ int mux,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error);
+
+ /*!
+ * \brief convert between input item format and usrp native format
+ *
+ * \param input_items[in] stream(s) of input items
+ * \param input_index[in] starting index in input_items
+ * \param input_items_available[in] number of items available starting at
item[index]
+ * \param input_items_consumed[out] number of input items consumed
by copy
+ * \param usrp_buffer[out] destination buffer
+ * \param usrp_buffer_length[in] \p usrp_buffer length in bytes
+ * \param bytes_written[out] number of bytes written into \p
usrp_buffer
+ */
+ virtual void copy_to_usrp_buffer (gr_vector_const_void_star &input_items,
+ int input_index,
+ int input_items_available,
+ int &input_items_consumed,
+ void *usrp_buffer,
+ int usrp_buffer_length,
+ int &bytes_written) = 0;
+
+ public:
+ //! magic value used on alternate register read interfaces
+ static const int READ_FAILED = -99999;
+
+
+ ~usrp_sink_base ();
+
+ int work (int noutput_items,
+ gr_vector_const_void_star &input_items,
+ gr_vector_void_star &output_items);
+
+ bool start();
+ bool stop();
+
+ /*!
+ * \brief Set interpolator rate. \p rate must be in [4, 1024] and a
multiple of 4.
+ *
+ * The final complex sample rate across the USB is
+ * dac_freq () / interp_rate () * nchannels ()
+ */
+ bool set_interp_rate (unsigned int rate);
+ bool set_nchannels (int nchan);
+ bool set_mux (int mux);
+
+ /*!
+ * \brief set the frequency of the digital up converter.
+ *
+ * \p channel must be 0. \p freq is the center frequency in Hz.
+ * It must be in the range [-44M, 44M]. The frequency specified is
+ * quantized. Use tx_freq to retrieve the actual value used.
+ */
+ bool set_tx_freq (int channel, double freq);
+
+ void set_verbose (bool verbose);
+
+ /*!
+ * \brief Set Programmable Gain Amplifier (PGA)
+ *
+ * \param which which D/A [0,3]
+ * \param gain_in_db gain value (linear in dB)
+ *
+ * gain is rounded to closest setting supported by hardware.
+ * Note that DAC 0 and DAC 1 share a gain setting as do DAC 2 and DAC 3.
+ * Setting DAC 0 affects DAC 1 and vice versa. Same with DAC 2 and DAC 3.
+ *
+ * \returns true iff sucessful.
+ *
+ * \sa pga_min(), pga_max(), pga_db_per_step()
+ */
+ bool set_pga (int which, double gain_in_db);
+
+ /*!
+ * \brief Return programmable gain amplifier gain in dB.
+ *
+ * \param which which D/A [0,3]
+ */
+ double pga (int which) const;
+
+ /*!
+ * \brief Return minimum legal PGA gain in dB.
+ */
+ double pga_min () const;
+
+ /*!
+ * \brief Return maximum legal PGA gain in dB.
+ */
+ double pga_max () const;
+
+ /*!
+ * \brief Return hardware step size of PGA (linear in dB).
+ */
+ double pga_db_per_step () const;
+
+
+ // ACCESSORS
+
+ long fpga_master_clock_freq() const;
+ long converter_rate() const;
+ long dac_rate() const { return converter_rate(); } // alias
+ long dac_freq() const { return converter_rate(); } // deprecated alias
+
+ unsigned int interp_rate () const;
+ int nchannels () const;
+ int mux () const;
+ double tx_freq (int channel) const;
+ int nunderruns () const { return d_nunderruns; }
+
+ /*!
+ * \brief Return daughterboard ID for given Rx daughterboard slot [0,1].
+ *
+ * \return daughterboard id >= 0 if successful
+ * \return -1 if no daugherboard
+ * \return -2 if invalid EEPROM on daughterboard
+ */
+ int daughterboard_id (int which_dboard) const;
+
+ /*!
+ * \brief Write auxiliary digital to analog converter.
+ *
+ * \param which_dboard [0,1] which d'board
+ * N.B., SLOT_TX_A and SLOT_RX_A share the same
AUX DAC's.
+ * SLOT_TX_B and SLOT_RX_B share the same AUX
DAC's.
+ * \param which_dac [2,3] TX slots must use only 2 and 3.
+ * \param value [0,4095]
+ * \returns true iff successful
+ */
+ bool write_aux_dac (int which_board, int which_dac, int value);
+
+ /*!
+ * \brief Read auxiliary analog to digital converter.
+ *
+ * \param which_dboard [0,1] which d'board
+ * \param which_adc [0,1]
+ * \returns value in the range [0,4095] if successful, else READ_FAILED.
+ */
+ int read_aux_adc (int which_dboard, int which_adc);
+
+ /*!
+ * \brief Write EEPROM on motherboard or any daughterboard.
+ * \param i2c_addr I2C bus address of EEPROM
+ * \param eeprom_offset byte offset in EEPROM to begin writing
+ * \param buf the data to write
+ * \returns true iff sucessful
+ */
+ bool write_eeprom (int i2c_addr, int eeprom_offset, const std::string buf);
+
+ /*!
+ * \brief Write EEPROM on motherboard or any daughterboard.
+ * \param i2c_addr I2C bus address of EEPROM
+ * \param eeprom_offset byte offset in EEPROM to begin reading
+ * \param len number of bytes to read
+ * \returns the data read if successful, else a zero length string.
+ */
+ std::string read_eeprom (int i2c_addr, int eeprom_offset, int len);
+
+ /*!
+ * \brief Write to I2C peripheral
+ * \param i2c_addr I2C bus address (7-bits)
+ * \param buf the data to write
+ * \returns true iff successful
+ * Writes are limited to a maximum of of 64 bytes.
+ */
+ bool write_i2c (int i2c_addr, const std::string buf);
+
+ /*!
+ * \brief Read from I2C peripheral
+ * \param i2c_addr I2C bus address (7-bits)
+ * \param len number of bytes to read
+ * \returns the data read if successful, else a zero length string.
+ * Reads are limited to a maximum of of 64 bytes.
+ */
+ std::string read_i2c (int i2c_addr, int len);
+
+ /*!
+ * \brief Set ADC offset correction
+ * \param which which ADC[0,3]: 0 = RX_A I, 1 = RX_A Q...
+ * \param offset 16-bit value to subtract from raw ADC input.
+ */
+ bool set_adc_offset (int which, int offset);
+
+ /*!
+ * \brief Set DAC offset correction
+ * \param which which DAC[0,3]: 0 = TX_A I, 1 = TX_A Q...
+ * \param offset 10-bit offset value (ambiguous format: See AD9862
datasheet).
+ * \param offset_pin 1-bit value. If 0 offset applied to -ve differential
pin;
+ * If 1 offset applied to +ve differential
pin.
+ */
+ bool set_dac_offset (int which, int offset, int offset_pin);
+
+ /*!
+ * \brief Control ADC input buffer
+ * \param which which ADC[0,3]
+ * \param bypass if non-zero, bypass input buffer and connect input
+ * directly to switched cap SHA input of RxPGA.
+ */
+ bool set_adc_buffer_bypass (int which, bool bypass);
+
+ /*!
+ * \brief return the usrp's serial number.
+ *
+ * \returns non-zero length string iff successful.
+ */
+ std::string serial_number();
+
+ /*!
+ * \brief Write direction register (output enables) for pins that go to
daughterboard.
+ *
+ * \param which_dboard [0,1] which d'board
+ * \param value value to write into register
+ * \param mask which bits of value to write into reg
+ *
+ * Each d'board has 16-bits of general purpose i/o.
+ * Setting the bit makes it an output from the FPGA to the d'board.
+ *
+ * This register is initialized based on a value stored in the
+ * d'board EEPROM. In general, you shouldn't be using this routine
+ * without a very good reason. Using this method incorrectly will
+ * kill your USRP motherboard and/or daughterboard.
+ */
+ bool _write_oe (int which_dboard, int value, int mask);
+
+ /*!
+ * \brief Write daughterboard i/o pin value
+ *
+ * \param which_dboard [0,1] which d'board
+ * \param value value to write into register
+ * \param mask which bits of value to write into reg
+ */
+ bool write_io (int which_dboard, int value, int mask);
+
+ /*!
+ * \brief Read daughterboard i/o pin value
+ *
+ * \param which_dboard [0,1] which d'board
+ * \returns register value if successful, else READ_FAILED
+ */
+ int read_io (int which_dboard);
+
+ //
+ // internal routines...
+ // You probably shouldn't be using these...
+ //
+ /*!
+ * \brief Write FPGA register.
+ * \param regno 7-bit register number
+ * \param value 32-bit value
+ * \returns true iff successful
+ */
+ bool _write_fpga_reg (int regno, int value); //< 7-bit regno, 32-bit value
+
+ /*!
+ * \brief Read FPGA register.
+ * \param regno 7-bit register number
+ * \returns register value if successful, else READ_FAILED
+ */
+ int _read_fpga_reg (int regno);
+
+ /*!
+ * \brief Write AD9862 register.
+ * \param which_codec 0 or 1
+ * \param regno 6-bit register number
+ * \param value 8-bit value
+ * \returns true iff successful
+ */
+ bool _write_9862 (int which_codec, int regno, unsigned char value);
+
+ /*!
+ * \brief Read AD9862 register.
+ * \param which_codec 0 or 1
+ * \param regno 6-bit register number
+ * \returns register value if successful, else READ_FAILED
+ */
+ int _read_9862 (int which_codec, int regno) const;
+
+ /*!
+ * \brief Write data to SPI bus peripheral.
+ *
+ * \param optional_header 0,1 or 2 bytes to write before buf.
+ * \param enables bitmask of peripherals to write. See
usrp_spi_defs.h
+ * \param format transaction format. See usrp_spi_defs.h
SPI_FMT_*
+ * \param buf the data to write
+ * \returns true iff successful
+ * Writes are limited to a maximum of 64 bytes.
+ *
+ * If \p format specifies that optional_header bytes are present, they are
+ * written to the peripheral immediately prior to writing \p buf.
+ */
+ bool _write_spi (int optional_header, int enables, int format, std::string
buf);
+
+ /*
+ * \brief Read data from SPI bus peripheral.
+ *
+ * \param optional_header 0,1 or 2 bytes to write before buf.
+ * \param enables bitmask of peripheral to read. See
usrp_spi_defs.h
+ * \param format transaction format. See usrp_spi_defs.h
SPI_FMT_*
+ * \param len number of bytes to read. Must be in
[0,64].
+ * \returns the data read if sucessful, else a zero length string.
+ *
+ * Reads are limited to a maximum of 64 bytes.
+ *
+ * If \p format specifies that optional_header bytes are present, they
+ * are written to the peripheral first. Then \p len bytes are read from
+ * the peripheral and returned.
+ */
+ std::string _read_spi (int optional_header, int enables, int format, int
len);
+};
+
+#endif /* INCLUDED_USRP1_SINK_BASE_H */
Copied: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_sink_c.cc
(from rev 9905,
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_sink_c.cc)
===================================================================
--- gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_sink_c.cc
(rev 0)
+++ gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_sink_c.cc
2008-11-02 23:26:56 UTC (rev 9907)
@@ -0,0 +1,106 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2004,2006 Free Software Foundation, Inc.
+ *
+ * This file is part of GNU Radio
+ *
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ *
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with GNU Radio; see the file COPYING. If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <usrp_sink_c.h>
+#include <gr_io_signature.h>
+#include <usrp_standard.h>
+#include <usrp_bytesex.h>
+
+usrp_sink_c_sptr
+usrp_make_sink_c (int which_board,
+ unsigned int interp_rate,
+ int nchan,
+ int mux,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error)
+{
+ return usrp_sink_c_sptr (new usrp_sink_c (which_board,
+ interp_rate,
+ nchan,
+ mux,
+ fusb_block_size,
+ fusb_nblocks,
+ fpga_filename,
+ firmware_filename
+ ));
+}
+
+
+usrp_sink_c::usrp_sink_c (int which_board,
+ unsigned int interp_rate,
+ int nchan,
+ int mux,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error)
+ : usrp_sink_base ("usrp_sink_c",
+ gr_make_io_signature (1, 1, sizeof (gr_complex)),
+ which_board, interp_rate, nchan, mux,
+ fusb_block_size, fusb_nblocks,
+ fpga_filename, firmware_filename)
+{
+}
+
+usrp_sink_c::~usrp_sink_c ()
+{
+ // NOP
+}
+
+/*
+ * Take one complex input stream and format it into interleaved short I & Q
+ * for the usrp.
+ */
+void
+usrp_sink_c::copy_to_usrp_buffer (gr_vector_const_void_star &input_items,
+ int input_index,
+ int input_items_available,
+ int &input_items_consumed, // out
+ void *usrp_buffer,
+ int usrp_buffer_length,
+ int &bytes_written) // out
+{
+ gr_complex *in = &((gr_complex *) input_items[0])[input_index];
+ short *dst = (short *) usrp_buffer;
+
+ static const int usrp_bytes_per_input_item = 2 * sizeof (short); // I & Q
+
+ int nitems = std::min (input_items_available,
+ usrp_buffer_length / usrp_bytes_per_input_item);
+
+ for (int i = 0; i < nitems; i++){
+ dst[2*i + 0] = host_to_usrp_short((short) real(in[i])); // FIXME
saturate?
+ dst[2*i + 1] = host_to_usrp_short((short) imag(in[i])); // FIXME
saturate?
+ }
+
+ input_items_consumed = nitems;
+ bytes_written = nitems * usrp_bytes_per_input_item;
+}
+
Copied: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_sink_c.h
(from rev 9905,
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_sink_c.h)
===================================================================
--- gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_sink_c.h
(rev 0)
+++ gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_sink_c.h
2008-11-02 23:26:56 UTC (rev 9907)
@@ -0,0 +1,87 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2004 Free Software Foundation, Inc.
+ *
+ * This file is part of GNU Radio
+ *
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ *
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with GNU Radio; see the file COPYING. If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#ifndef INCLUDED_USRP1_SINK_C_H
+#define INCLUDED_USRP1_SINK_C_H
+
+#include <usrp_sink_base.h>
+
+class usrp_sink_c;
+typedef boost::shared_ptr<usrp_sink_c> usrp_sink_c_sptr;
+
+
+// public shared_ptr constructor
+
+usrp_sink_c_sptr
+usrp_make_sink_c (int which_board,
+ unsigned int interp_rate,
+ int nchan,
+ int mux,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error);
+
+
+/*!
+ * \brief interface to Universal Software Radio Peripheral Tx path (Rev 1)
+ *
+ * input: gr_complex
+ */
+class usrp_sink_c : public usrp_sink_base {
+ private:
+
+ friend usrp_sink_c_sptr
+ usrp_make_sink_c (int which_board,
+ unsigned int interp_rate,
+ int nchan,
+ int mux,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error);
+
+ protected:
+ usrp_sink_c (int which_board,
+ unsigned int interp_rate,
+ int nchan,
+ int mux,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error);
+
+ virtual void copy_to_usrp_buffer (gr_vector_const_void_star &input_items,
+ int input_index,
+ int input_items_available,
+ int &input_items_consumed,
+ void *usrp_buffer,
+ int usrp_buffer_length,
+ int &bytes_written);
+ public:
+ ~usrp_sink_c ();
+};
+
+#endif /* INCLUDED_USRP1_SINK_C_H */
Copied: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_sink_s.cc
(from rev 9905,
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_sink_s.cc)
===================================================================
--- gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_sink_s.cc
(rev 0)
+++ gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_sink_s.cc
2008-11-02 23:26:56 UTC (rev 9907)
@@ -0,0 +1,106 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2004,2006 Free Software Foundation, Inc.
+ *
+ * This file is part of GNU Radio
+ *
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ *
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with GNU Radio; see the file COPYING. If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <usrp_sink_s.h>
+#include <gr_io_signature.h>
+#include <usrp_standard.h>
+#include <usrp_bytesex.h>
+
+usrp_sink_s_sptr
+usrp_make_sink_s (int which_board,
+ unsigned int interp_rate,
+ int nchan,
+ int mux,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error)
+{
+ return usrp_sink_s_sptr (new usrp_sink_s (which_board,
+ interp_rate,
+ nchan,
+ mux,
+ fusb_block_size,
+ fusb_nblocks,
+ fpga_filename,
+ firmware_filename
+ ));
+}
+
+
+usrp_sink_s::usrp_sink_s (int which_board,
+ unsigned int interp_rate,
+ int nchan,
+ int mux,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error)
+ : usrp_sink_base ("usrp_sink_s",
+ gr_make_io_signature (1, 1, sizeof (short)),
+ which_board, interp_rate, nchan, mux,
+ fusb_block_size, fusb_nblocks,
+ fpga_filename, firmware_filename)
+{
+ set_output_multiple (512 / sizeof(short)); // don't change
+}
+
+usrp_sink_s::~usrp_sink_s ()
+{
+ // NOP
+}
+
+/*
+ * Take one short input stream and format it into interleaved short I & Q
+ * for the usrp.
+ */
+void
+usrp_sink_s::copy_to_usrp_buffer (gr_vector_const_void_star &input_items,
+ int input_index,
+ int input_items_available,
+ int &input_items_consumed, // out
+ void *usrp_buffer,
+ int usrp_buffer_length,
+ int &bytes_written) // out
+{
+ short *in = &((short *) input_items[0])[input_index];
+ short *dst = (short *) usrp_buffer;
+
+ static const int usrp_bytes_per_input_item = sizeof (short);
+
+ int nitems = std::min (input_items_available,
+ usrp_buffer_length / usrp_bytes_per_input_item);
+
+ for (int i = 0; i < nitems; i++){ // FIXME unroll
+ dst[i] = host_to_usrp_short(in[i]);
+ }
+
+ input_items_consumed = nitems;
+ bytes_written = nitems * usrp_bytes_per_input_item;
+}
+
Copied: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_sink_s.h
(from rev 9905,
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_sink_s.h)
===================================================================
--- gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_sink_s.h
(rev 0)
+++ gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_sink_s.h
2008-11-02 23:26:56 UTC (rev 9907)
@@ -0,0 +1,86 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2004 Free Software Foundation, Inc.
+ *
+ * This file is part of GNU Radio
+ *
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ *
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with GNU Radio; see the file COPYING. If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#ifndef INCLUDED_USRP1_SINK_S_H
+#define INCLUDED_USRP1_SINK_S_H
+
+#include <usrp_sink_base.h>
+
+class usrp_sink_s;
+typedef boost::shared_ptr<usrp_sink_s> usrp_sink_s_sptr;
+
+
+// public shared_ptr constructor
+
+usrp_sink_s_sptr
+usrp_make_sink_s (int which_board,
+ unsigned int interp_rate,
+ int nchan,
+ int mux,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error);
+
+/*!
+ * \brief interface to Universal Software Radio Peripheral Tx path (Rev 1)
+ *
+ * input: short
+ */
+class usrp_sink_s : public usrp_sink_base {
+ private:
+
+ friend usrp_sink_s_sptr
+ usrp_make_sink_s (int which_board,
+ unsigned int interp_rate,
+ int nchan,
+ int mux,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error);
+
+ protected:
+ usrp_sink_s (int which_board,
+ unsigned int interp_rate,
+ int nchan,
+ int mux,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error);
+
+ virtual void copy_to_usrp_buffer (gr_vector_const_void_star &input_items,
+ int input_index,
+ int input_items_available,
+ int &input_items_consumed,
+ void *usrp_buffer,
+ int usrp_buffer_length,
+ int &bytes_written);
+ public:
+ ~usrp_sink_s ();
+};
+
+#endif /* INCLUDED_USRP1_SINK_S_H */
Copied:
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_base.cc (from
rev 9905,
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_source_base.cc)
===================================================================
--- gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_base.cc
(rev 0)
+++ gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_base.cc
2008-11-02 23:26:56 UTC (rev 9907)
@@ -0,0 +1,425 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2004 Free Software Foundation, Inc.
+ *
+ * This file is part of GNU Radio
+ *
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ *
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with GNU Radio; see the file COPYING. If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <usrp_source_base.h>
+#include <gr_io_signature.h>
+#include <usrp_standard.h>
+#include <assert.h>
+
+static const int OUTPUT_MULTIPLE_BYTES = 4 * 1024;
+
+usrp_source_base::usrp_source_base (const std::string &name,
+ gr_io_signature_sptr output_signature,
+ int which_board,
+ unsigned int decim_rate,
+ int nchan,
+ int mux,
+ int mode,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error)
+ : gr_sync_block (name,
+ gr_make_io_signature (0, 0, 0),
+ output_signature),
+ d_noverruns (0)
+{
+ d_usrp = usrp_standard_rx::make (which_board, decim_rate,
+ nchan, mux, mode,
+ fusb_block_size,
+ fusb_nblocks,
+ fpga_filename,
+ firmware_filename);
+ if (d_usrp == 0)
+ throw std::runtime_error ("can't open usrp");
+
+ // All calls to d_usrp->read must be multiples of 512 bytes.
+ // We jack this up to 4k to reduce overhead.
+
+ set_output_multiple (OUTPUT_MULTIPLE_BYTES /
output_signature->sizeof_stream_item (0));
+}
+
+usrp_source_base::~usrp_source_base ()
+{
+ delete d_usrp;
+}
+
+unsigned int
+usrp_source_base::sizeof_basic_sample() const
+{
+ return usrp_standard_rx::format_width(d_usrp->format()) / 8;
+}
+
+bool
+usrp_source_base::start()
+{
+ return d_usrp->start();
+}
+
+bool
+usrp_source_base::stop()
+{
+ return d_usrp->stop();
+}
+
+int
+usrp_source_base::work (int noutput_items,
+ gr_vector_const_void_star &input_items,
+ gr_vector_void_star &output_items)
+{
+ static const int BUFSIZE = 4 * OUTPUT_MULTIPLE_BYTES;
+ unsigned char buf[BUFSIZE];
+ int output_index = 0;
+ int output_items_produced;
+ int bytes_read;
+ bool overrun;
+
+ while (output_index < noutput_items){
+ int nbytes = ninput_bytes_reqd_for_noutput_items (noutput_items -
output_index);
+ nbytes = std::min (nbytes, BUFSIZE);
+
+ int result_nbytes = d_usrp->read (buf, nbytes, &overrun);
+ if (overrun){
+ // fprintf (stderr, "usrp_source: overrun\n");
+ fputs ("uO", stderr);
+ d_noverruns++;
+ }
+
+ if (result_nbytes < 0) // We've got a problem. Usually board
unplugged or powered down.
+ return -1; // Indicate we're done.
+
+ if (result_nbytes != nbytes){ // not really an error, but unexpected
+ fprintf (stderr, "usrp_source: short read. Expected %d, got %d\n",
+ nbytes, result_nbytes);
+ }
+
+ copy_from_usrp_buffer (output_items,
+ output_index,
+ noutput_items - output_index, //
output_items_available
+ output_items_produced, // [out]
+ buf, // usrp_buffer
+ result_nbytes, // usrp_buffer_length
+ bytes_read); // [out]
+
+ assert (output_index + output_items_produced <= noutput_items);
+ assert (bytes_read == result_nbytes);
+
+ output_index += output_items_produced;
+ }
+
+ return noutput_items;
+}
+
+
+bool
+usrp_source_base::set_decim_rate (unsigned int rate)
+{
+ return d_usrp->set_decim_rate (rate);
+}
+
+bool
+usrp_source_base::set_nchannels (int nchan)
+{
+ return d_usrp->set_nchannels (nchan);
+}
+
+bool
+usrp_source_base::set_mux (int mux)
+{
+ return d_usrp->set_mux (mux);
+}
+
+bool
+usrp_source_base::set_rx_freq (int channel, double freq)
+{
+ return d_usrp->set_rx_freq (channel, freq);
+}
+
+long
+usrp_source_base::fpga_master_clock_freq() const
+{
+ return d_usrp->fpga_master_clock_freq();
+}
+
+long
+usrp_source_base::converter_rate() const
+{
+ return d_usrp->converter_rate();
+}
+
+unsigned int
+usrp_source_base::decim_rate () const
+{
+ return d_usrp->decim_rate ();
+}
+
+int
+usrp_source_base::nchannels () const
+{
+ return d_usrp->nchannels ();
+}
+
+int
+usrp_source_base::mux () const
+{
+ return d_usrp->mux ();
+}
+
+double
+usrp_source_base::rx_freq (int channel) const
+{
+ return d_usrp->rx_freq (channel);
+}
+
+bool
+usrp_source_base::set_fpga_mode (int mode)
+{
+ return d_usrp->set_fpga_mode (mode);
+}
+
+bool
+usrp_source_base::set_ddc_phase (int channel, int phase)
+{
+ return d_usrp->set_ddc_phase(channel, phase);
+}
+
+bool
+usrp_source_base::set_dc_offset_cl_enable(int bits, int mask)
+{
+ return d_usrp->set_dc_offset_cl_enable(bits, mask);
+}
+
+void
+usrp_source_base::set_verbose (bool verbose)
+{
+ d_usrp->set_verbose (verbose);
+}
+
+bool
+usrp_source_base::write_aux_dac (int which_dboard, int which_dac, int value)
+{
+ return d_usrp->write_aux_dac (which_dboard, which_dac, value);
+}
+
+int
+usrp_source_base::read_aux_adc (int which_dboard, int which_adc)
+{
+ return d_usrp->read_aux_adc (which_dboard, which_adc);
+}
+
+bool
+usrp_source_base::write_eeprom (int i2c_addr, int eeprom_offset, const
std::string buf)
+{
+ return d_usrp->write_eeprom (i2c_addr, eeprom_offset, buf);
+}
+
+std::string
+usrp_source_base::read_eeprom (int i2c_addr, int eeprom_offset, int len)
+{
+ return d_usrp->read_eeprom (i2c_addr, eeprom_offset, len);
+}
+
+bool
+usrp_source_base::write_i2c (int i2c_addr, const std::string buf)
+{
+ return d_usrp->write_i2c (i2c_addr, buf);
+}
+
+std::string
+usrp_source_base::read_i2c (int i2c_addr, int len)
+{
+ return d_usrp->read_i2c (i2c_addr, len);
+}
+
+bool
+usrp_source_base::set_pga (int which, double gain)
+{
+ return d_usrp->set_pga (which, gain);
+}
+
+double
+usrp_source_base::pga (int which) const
+{
+ return d_usrp->pga (which);
+}
+
+double
+usrp_source_base::pga_min () const
+{
+ return d_usrp->pga_min ();
+}
+
+double
+usrp_source_base::pga_max () const
+{
+ return d_usrp->pga_max ();
+}
+
+double
+usrp_source_base::pga_db_per_step () const
+{
+ return d_usrp->pga_db_per_step ();
+}
+
+int
+usrp_source_base::daughterboard_id (int which) const
+{
+ return d_usrp->daughterboard_id (which);
+}
+
+
+bool
+usrp_source_base::set_adc_offset (int which, int offset)
+{
+ return d_usrp->set_adc_offset (which, offset);
+}
+
+bool
+usrp_source_base::set_dac_offset (int which, int offset, int offset_pin)
+{
+ return d_usrp->set_dac_offset (which, offset, offset_pin);
+}
+
+bool
+usrp_source_base::set_adc_buffer_bypass (int which, bool bypass)
+{
+ return d_usrp->set_adc_buffer_bypass (which, bypass);
+}
+
+std::string
+usrp_source_base::serial_number()
+{
+ return d_usrp->serial_number();
+}
+
+bool
+usrp_source_base::_write_oe (int which_dboard, int value, int mask)
+{
+ return d_usrp->_write_oe (which_dboard, value, mask);
+}
+
+bool
+usrp_source_base::write_io (int which_dboard, int value, int mask)
+{
+ return d_usrp->write_io (which_dboard, value, mask);
+}
+
+int
+usrp_source_base::read_io (int which_dboard)
+{
+ return d_usrp->read_io (which_dboard);
+}
+
+
+
+
+// internal routines...
+
+bool
+usrp_source_base::_write_fpga_reg (int regno, int value)
+{
+ return d_usrp->_write_fpga_reg (regno, value);
+}
+
+bool
+usrp_source_base::_write_fpga_reg_masked (int regno, int value, int mask)
+{
+ return d_usrp->_write_fpga_reg_masked (regno, value, mask);
+}
+
+int
+usrp_source_base::_read_fpga_reg (int regno)
+{
+ return d_usrp->_read_fpga_reg (regno);
+}
+
+bool
+usrp_source_base::_write_9862 (int which_codec, int regno, unsigned char value)
+{
+ return d_usrp->_write_9862 (which_codec, regno, value);
+}
+
+int
+usrp_source_base::_read_9862 (int which_codec, int regno) const
+{
+ return d_usrp->_read_9862 (which_codec, regno);
+}
+
+bool
+usrp_source_base::_write_spi (int optional_header, int enables,
+ int format, std::string buf)
+{
+ return d_usrp->_write_spi (optional_header, enables, format, buf);
+}
+
+std::string
+usrp_source_base::_read_spi (int optional_header, int enables, int format, int
len)
+{
+ return d_usrp->_read_spi (optional_header, enables, format, len);
+}
+
+bool
+usrp_source_base::set_format(unsigned int format)
+{
+ return d_usrp->set_format(format);
+}
+
+unsigned int
+usrp_source_base::format() const
+{
+ return d_usrp->format();
+}
+
+unsigned int
+usrp_source_base::make_format(int width, int shift, bool want_q, bool
bypass_halfband)
+{
+ return usrp_standard_rx::make_format(width, shift, want_q, bypass_halfband);
+}
+
+int
+usrp_source_base::format_width(unsigned int format)
+{
+ return usrp_standard_rx::format_width(format);
+}
+
+int
+usrp_source_base::format_shift(unsigned int format)
+{
+ return usrp_standard_rx::format_shift(format);
+}
+
+bool
+usrp_source_base::format_want_q(unsigned int format)
+{
+ return usrp_standard_rx::format_want_q(format);
+}
+
+bool
+usrp_source_base::format_bypass_halfband(unsigned int format)
+{
+ return usrp_standard_rx::format_bypass_halfband(format);
+}
Copied:
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_base.h (from
rev 9905,
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_source_base.h)
===================================================================
--- gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_base.h
(rev 0)
+++ gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_base.h
2008-11-02 23:26:56 UTC (rev 9907)
@@ -0,0 +1,455 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2004 Free Software Foundation, Inc.
+ *
+ * This file is part of GNU Radio
+ *
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ *
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with GNU Radio; see the file COPYING. If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#ifndef INCLUDED_USRP1_SOURCE_BASE_H
+#define INCLUDED_USRP1_SOURCE_BASE_H
+
+#include <gr_sync_block.h>
+#include <stdexcept>
+
+class usrp_standard_rx;
+
+/*!
+ * \brief abstract interface to Universal Software Radio Peripheral Rx path
(Rev 1)
+ */
+class usrp_source_base : public gr_sync_block {
+ private:
+ usrp_standard_rx *d_usrp;
+ int d_noverruns;
+
+ protected:
+ usrp_source_base (const std::string &name,
+ gr_io_signature_sptr output_signature,
+ int which_board,
+ unsigned int decim_rate,
+ int nchan,
+ int mux,
+ int mode,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error);
+
+ /*!
+ * \brief return number of usrp input bytes required to produce noutput
items.
+ */
+ virtual int ninput_bytes_reqd_for_noutput_items (int noutput_items) = 0;
+
+ /*!
+ * \brief number of bytes in a low-level sample
+ */
+ unsigned int sizeof_basic_sample() const;
+
+ /*!
+ * \brief convert between native usrp format and output item format
+ *
+ * \param output_items[out] stream(s) of output items
+ * \param output_index[in] starting index in output_items
+ * \param output_items_available[in] number of empty items available at
item[index]
+ * \param output_items_produced[out] number of items produced by copy
+ * \param usrp_buffer[in] source buffer
+ * \param usrp_buffer_length[in] number of bytes available in \p
usrp_buffer
+ * \param bytes_read[out] number of bytes read from \p usrp_buffer
+ *
+ * The copy must consume all bytes available. That is, \p bytes_read must
equal
+ * \p usrp_buffer_length.
+ */
+ virtual void copy_from_usrp_buffer (gr_vector_void_star &output_items,
+ int output_index,
+ int output_items_available,
+ int &output_items_produced,
+ const void *usrp_buffer,
+ int usrp_buffer_length,
+ int &bytes_read) = 0;
+
+ public:
+ //! magic value used on alternate register read interfaces
+ static const int READ_FAILED = -99999;
+
+ ~usrp_source_base ();
+
+ int work (int noutput_items,
+ gr_vector_const_void_star &input_items,
+ gr_vector_void_star &output_items);
+
+ bool start();
+ bool stop();
+
+ /*!
+ * \brief Set decimator rate. \p rate must be EVEN and in [8, 256].
+ *
+ * The final complex sample rate across the USB is
+ * adc_freq () / decim_rate ()
+ */
+ bool set_decim_rate (unsigned int rate);
+ bool set_nchannels (int nchan);
+ bool set_mux (int mux);
+
+ /*!
+ * \brief set the center frequency of the digital down converter.
+ *
+ * \p channel must be 0. \p freq is the center frequency in Hz.
+ * It must be in the range [-FIXME, FIXME]. The frequency specified is
+ * quantized. Use rx_freq to retrieve the actual value used.
+ */
+ bool set_rx_freq (int channel, double freq);
+
+ /*!
+ * \brief set fpga special modes
+ */
+ bool set_fpga_mode (int mode);
+
+ void set_verbose (bool verbose);
+
+ /*!
+ * \brief Set the digital down converter phase register.
+ *
+ * \param channel which ddc channel [0, 3]
+ * \param phase 32-bit integer phase value.
+ */
+ bool set_ddc_phase(int channel, int phase);
+
+ /*!
+ * \brief Set Programmable Gain Amplifier (PGA)
+ *
+ * \param which which A/D [0,3]
+ * \param gain_in_db gain value (linear in dB)
+ *
+ * gain is rounded to closest setting supported by hardware.
+ *
+ * \returns true iff sucessful.
+ *
+ * \sa pga_min(), pga_max(), pga_db_per_step()
+ */
+ bool set_pga (int which, double gain_in_db);
+
+ /*!
+ * \brief Return programmable gain amplifier gain setting in dB.
+ *
+ * \param which which A/D [0,3]
+ */
+ double pga (int which) const;
+
+ /*!
+ * \brief Return minimum legal PGA setting in dB.
+ */
+ double pga_min () const;
+
+ /*!
+ * \brief Return maximum legal PGA setting in dB.
+ */
+ double pga_max () const;
+
+ /*!
+ * \brief Return hardware step size of PGA (linear in dB).
+ */
+ double pga_db_per_step () const;
+
+ // ACCESSORS
+
+ long fpga_master_clock_freq() const;
+ long converter_rate() const;
+ long adc_rate() const { return converter_rate(); } // alias
+ long adc_freq() const { return converter_rate(); } // deprecated alias
+
+ unsigned int decim_rate () const;
+ int nchannels () const;
+ int mux () const;
+ double rx_freq (int channel) const;
+ int noverruns () const { return d_noverruns; }
+
+ /*!
+ * \brief Return daughterboard ID for given Rx daughterboard slot [0,1].
+ *
+ * \return daughterboard id >= 0 if successful
+ * \return -1 if no daugherboard
+ * \return -2 if invalid EEPROM on daughterboard
+ */
+ int daughterboard_id (int which_dboard) const;
+
+ /*!
+ * \brief Write auxiliary digital to analog converter.
+ *
+ * \param which_dboard [0,1] which d'board
+ * N.B., SLOT_TX_A and SLOT_RX_A share the same
AUX DAC's.
+ * SLOT_TX_B and SLOT_RX_B share the same AUX
DAC's.
+ * \param which_dac [2,3] TX slots must use only 2 and 3.
+ * \param value [0,4095]
+ * \returns true iff successful
+ */
+ bool write_aux_dac (int which_board, int which_dac, int value);
+
+ /*!
+ * \brief Read auxiliary analog to digital converter.
+ *
+ * \param which_dboard [0,1] which d'board
+ * \param which_adc [0,1]
+ * \returns value in the range [0,4095] if successful, else READ_FAILED.
+ */
+ int read_aux_adc (int which_dboard, int which_adc);
+
+ /*!
+ * \brief Write EEPROM on motherboard or any daughterboard.
+ * \param i2c_addr I2C bus address of EEPROM
+ * \param eeprom_offset byte offset in EEPROM to begin writing
+ * \param buf the data to write
+ * \returns true iff sucessful
+ */
+ bool write_eeprom (int i2c_addr, int eeprom_offset, const std::string buf);
+
+ /*!
+ * \brief Write EEPROM on motherboard or any daughterboard.
+ * \param i2c_addr I2C bus address of EEPROM
+ * \param eeprom_offset byte offset in EEPROM to begin reading
+ * \param len number of bytes to read
+ * \returns the data read if successful, else a zero length string.
+ */
+ std::string read_eeprom (int i2c_addr, int eeprom_offset, int len);
+
+ /*!
+ * \brief Write to I2C peripheral
+ * \param i2c_addr I2C bus address (7-bits)
+ * \param buf the data to write
+ * \returns true iff successful
+ * Writes are limited to a maximum of of 64 bytes.
+ */
+ bool write_i2c (int i2c_addr, const std::string buf);
+
+ /*!
+ * \brief Read from I2C peripheral
+ * \param i2c_addr I2C bus address (7-bits)
+ * \param len number of bytes to read
+ * \returns the data read if successful, else a zero length string.
+ * Reads are limited to a maximum of of 64 bytes.
+ */
+ std::string read_i2c (int i2c_addr, int len);
+
+ /*!
+ * \brief Set ADC offset correction
+ * \param which which ADC[0,3]: 0 = RX_A I, 1 = RX_A Q...
+ * \param offset 16-bit value to subtract from raw ADC input.
+ */
+ bool set_adc_offset (int which, int offset);
+
+ /*!
+ * \brief Set DAC offset correction
+ * \param which which DAC[0,3]: 0 = TX_A I, 1 = TX_A Q...
+ * \param offset 10-bit offset value (ambiguous format: See AD9862
datasheet).
+ * \param offset_pin 1-bit value. If 0 offset applied to -ve differential
pin;
+ * If 1 offset applied to +ve differential
pin.
+ */
+ bool set_dac_offset (int which, int offset, int offset_pin);
+
+ /*!
+ * \brief Control ADC input buffer
+ * \param which which ADC[0,3]
+ * \param bypass if non-zero, bypass input buffer and connect input
+ * directly to switched cap SHA input of RxPGA.
+ */
+ bool set_adc_buffer_bypass (int which, bool bypass);
+
+ /*!
+ * \brief return the usrp's serial number.
+ *
+ * \returns non-zero length string iff successful.
+ */
+ std::string serial_number();
+
+ /*!
+ * \brief Write direction register (output enables) for pins that go to
daughterboard.
+ *
+ * \param which_dboard [0,1] which d'board
+ * \param value value to write into register
+ * \param mask which bits of value to write into reg
+ *
+ * Each d'board has 16-bits of general purpose i/o.
+ * Setting the bit makes it an output from the FPGA to the d'board.
+ *
+ * This register is initialized based on a value stored in the
+ * d'board EEPROM. In general, you shouldn't be using this routine
+ * without a very good reason. Using this method incorrectly will
+ * kill your USRP motherboard and/or daughterboard.
+ */
+ bool _write_oe (int which_dboard, int value, int mask);
+
+ /*!
+ * \brief Write daughterboard i/o pin value
+ *
+ * \param which_dboard [0,1] which d'board
+ * \param value value to write into register
+ * \param mask which bits of value to write into reg
+ */
+ bool write_io (int which_dboard, int value, int mask);
+
+ /*!
+ * \brief Read daughterboard i/o pin value
+ *
+ * \param which_dboard [0,1] which d'board
+ * \returns register value if successful, else READ_FAILED
+ */
+ int read_io (int which_dboard);
+
+ /*!
+ * \brief Enable/disable automatic DC offset removal control loop in FPGA
+ *
+ * \param bits which control loops to enable
+ * \param mask which \p bits to pay attention to
+ *
+ * If the corresponding bit is set, enable the automatic DC
+ * offset correction control loop.
+ *
+ * <pre>
+ * The 4 low bits are significant:
+ *
+ * ADC0 = (1 << 0)
+ * ADC1 = (1 << 1)
+ * ADC2 = (1 << 2)
+ * ADC3 = (1 << 3)
+ * </pre>
+ *
+ * By default the control loop is enabled on all ADC's.
+ */
+ bool set_dc_offset_cl_enable(int bits, int mask);
+
+ /*!
+ * \brief Specify Rx data format.
+ *
+ * \param format format specifier
+ *
+ * Rx data format control register
+ *
+ * 3 2 1
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * +-----------------------------------------+-+-+---------+-------+
+ * | Reserved (Must be zero) |B|Q| WIDTH | SHIFT |
+ * +-----------------------------------------+-+-+---------+-------+
+ *
+ * SHIFT specifies arithmetic right shift [0, 15]
+ * WIDTH specifies bit-width of I & Q samples across the USB [1, 16] (not
all valid)
+ * Q if set deliver both I & Q, else just I
+ * B if set bypass half-band filter.
+ *
+ * Right now the acceptable values are:
+ *
+ * B Q WIDTH SHIFT
+ * 0 1 16 0
+ * 0 1 8 8
+ *
+ * More valid combos to come.
+ *
+ * Default value is 0x00000300 16-bits, 0 shift, deliver both I & Q.
+ */
+ bool set_format(unsigned int format);
+
+ /*!
+ * \brief return current format
+ */
+ unsigned int format () const;
+
+ static unsigned int make_format(int width=16, int shift=0,
+ bool want_q=true, bool bypass_halfband=false);
+ static int format_width(unsigned int format);
+ static int format_shift(unsigned int format);
+ static bool format_want_q(unsigned int format);
+ static bool format_bypass_halfband(unsigned int format);
+
+ // ----------------------------------------------------------------
+ // internal routines...
+ // You probably shouldn't be using these...
+ // ----------------------------------------------------------------
+
+ /*!
+ * \brief Write FPGA register.
+ * \param regno 7-bit register number
+ * \param value 32-bit value
+ * \returns true iff successful
+ */
+ bool _write_fpga_reg (int regno, int value); //< 7-bit regno, 32-bit value
+
+ /*!
+ * \brief Write FPGA register masked.
+ * \param regno 7-bit register number
+ * \param value 16-bit value
+ * \param mask 16-bit mask
+ * \returns true iff successful
+ */
+ bool _write_fpga_reg_masked (int regno, int value, int mask); //<
7-bit regno, 16-bit value, 16-bit mask
+
+ /*!
+ * \brief Read FPGA register.
+ * \param regno 7-bit register number
+ * \returns register value if successful, else READ_FAILED
+ */
+ int _read_fpga_reg (int regno);
+
+ /*!
+ * \brief Write AD9862 register.
+ * \param which_codec 0 or 1
+ * \param regno 6-bit register number
+ * \param value 8-bit value
+ * \returns true iff successful
+ */
+ bool _write_9862 (int which_codec, int regno, unsigned char value);
+
+ /*!
+ * \brief Read AD9862 register.
+ * \param which_codec 0 or 1
+ * \param regno 6-bit register number
+ * \returns register value if successful, else READ_FAILED
+ */
+ int _read_9862 (int which_codec, int regno) const;
+
+ /*!
+ * \brief Write data to SPI bus peripheral.
+ *
+ * \param optional_header 0,1 or 2 bytes to write before buf.
+ * \param enables bitmask of peripherals to write. See
usrp_spi_defs.h
+ * \param format transaction format. See usrp_spi_defs.h
SPI_FMT_*
+ * \param buf the data to write
+ * \returns true iff successful
+ * Writes are limited to a maximum of 64 bytes.
+ *
+ * If \p format specifies that optional_header bytes are present, they are
+ * written to the peripheral immediately prior to writing \p buf.
+ */
+ bool _write_spi (int optional_header, int enables, int format, std::string
buf);
+
+ /*
+ * \brief Read data from SPI bus peripheral.
+ *
+ * \param optional_header 0,1 or 2 bytes to write before buf.
+ * \param enables bitmask of peripheral to read. See
usrp_spi_defs.h
+ * \param format transaction format. See usrp_spi_defs.h
SPI_FMT_*
+ * \param len number of bytes to read. Must be in
[0,64].
+ * \returns the data read if sucessful, else a zero length string.
+ *
+ * Reads are limited to a maximum of 64 bytes.
+ *
+ * If \p format specifies that optional_header bytes are present, they
+ * are written to the peripheral first. Then \p len bytes are read from
+ * the peripheral and returned.
+ */
+ std::string _read_spi (int optional_header, int enables, int format, int
len);
+};
+
+#endif /* INCLUDED_USRP1_SOURCE_BASE_H */
Copied: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_c.cc
(from rev 9905,
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_source_c.cc)
===================================================================
--- gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_c.cc
(rev 0)
+++ gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_c.cc
2008-11-02 23:26:56 UTC (rev 9907)
@@ -0,0 +1,131 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2004,2006 Free Software Foundation, Inc.
+ *
+ * This file is part of GNU Radio
+ *
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ *
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with GNU Radio; see the file COPYING. If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <usrp_source_c.h>
+#include <gr_io_signature.h>
+#include <usrp_standard.h>
+#include <usrp_bytesex.h>
+
+static const int NBASIC_SAMPLES_PER_ITEM = 2; // I & Q
+
+usrp_source_c_sptr
+usrp_make_source_c (int which_board,
+ unsigned int decim_rate,
+ int nchan,
+ int mux,
+ int mode,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error)
+{
+ return usrp_source_c_sptr (new usrp_source_c (which_board,
+ decim_rate,
+ nchan,
+ mux,
+ mode,
+ fusb_block_size,
+ fusb_nblocks,
+ fpga_filename,
+ firmware_filename
+ ));
+}
+
+
+usrp_source_c::usrp_source_c (int which_board,
+ unsigned int decim_rate,
+ int nchan,
+ int mux,
+ int mode,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error)
+ : usrp_source_base ("usrp_source_c",
+ gr_make_io_signature (1, 1, sizeof (gr_complex)),
+ which_board, decim_rate, nchan, mux, mode,
+ fusb_block_size, fusb_nblocks,
+ fpga_filename, firmware_filename)
+{
+}
+
+usrp_source_c::~usrp_source_c ()
+{
+ // NOP
+}
+
+int
+usrp_source_c::ninput_bytes_reqd_for_noutput_items (int noutput_items)
+{
+ return noutput_items * NBASIC_SAMPLES_PER_ITEM * sizeof_basic_sample();
+}
+
+/*
+ * Convert interleaved 8 or 16-bit I & Q from usrp buffer into a single
+ * complex output stream.
+ */
+void
+usrp_source_c::copy_from_usrp_buffer (gr_vector_void_star &output_items,
+ int output_index,
+ int output_items_available,
+ int &output_items_produced,
+ const void *usrp_buffer,
+ int usrp_buffer_length,
+ int &bytes_read)
+{
+ gr_complex *out = &((gr_complex *) output_items[0])[output_index];
+ unsigned sbs = sizeof_basic_sample();
+ unsigned nusrp_bytes_per_item = NBASIC_SAMPLES_PER_ITEM * sbs;
+
+ int nitems = std::min (output_items_available,
+ (int)(usrp_buffer_length / nusrp_bytes_per_item));
+
+ signed char *s8 = (signed char *) usrp_buffer;
+ short *s16 = (short *) usrp_buffer;
+
+ switch (sbs){
+ case 1:
+ for (int i = 0; i < nitems; i++){
+ out[i] = gr_complex ((float)(s8[2*i+0] << 8), (float)(s8[2*i+1] << 8));
+ }
+ break;
+
+ case 2:
+ for (int i = 0; i < nitems; i++){
+ out[i] = gr_complex ((float) usrp_to_host_short(s16[2*i+0]),
+ (float) usrp_to_host_short(s16[2*i+1]));
+ }
+ break;
+
+ default:
+ assert(0);
+ }
+
+ output_items_produced = nitems;
+ bytes_read = nitems * nusrp_bytes_per_item;
+}
Copied: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_c.h
(from rev 9905,
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_source_c.h)
===================================================================
--- gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_c.h
(rev 0)
+++ gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_c.h
2008-11-02 23:26:56 UTC (rev 9907)
@@ -0,0 +1,93 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2004 Free Software Foundation, Inc.
+ *
+ * This file is part of GNU Radio
+ *
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ *
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with GNU Radio; see the file COPYING. If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#ifndef INCLUDED_USRP1_SOURCE_C_H
+#define INCLUDED_USRP1_SOURCE_C_H
+
+#include <usrp_source_base.h>
+#include <stdexcept>
+
+class usrp_standard_rx;
+
+
+class usrp_source_c;
+typedef boost::shared_ptr<usrp_source_c> usrp_source_c_sptr;
+
+
+// public shared_ptr constructor
+
+usrp_source_c_sptr
+usrp_make_source_c (int which_board,
+ unsigned int decim_rate,
+ int nchan,
+ int mux,
+ int mode,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error);
+
+/*!
+ * \brief interface to Universal Software Radio Peripheral Rx path (Rev 1)
+ */
+class usrp_source_c : public usrp_source_base {
+ private:
+ friend usrp_source_c_sptr
+ usrp_make_source_c (int which_board,
+ unsigned int decim_rate,
+ int nchan,
+ int mux,
+ int mode,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error);
+
+ protected:
+ usrp_source_c (int which_board,
+ unsigned int decim_rate,
+ int nchan,
+ int mux,
+ int mode,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error);
+
+ virtual int ninput_bytes_reqd_for_noutput_items (int noutput_items);
+
+ virtual void copy_from_usrp_buffer (gr_vector_void_star &output_items,
+ int output_index,
+ int output_items_available,
+ int &output_items_produced,
+ const void *usrp_buffer,
+ int usrp_buffer_length,
+ int &bytes_read);
+
+ public:
+ ~usrp_source_c ();
+};
+
+#endif /* INCLUDED_USRP1_SOURCE_C_H */
Copied: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_s.cc
(from rev 9905,
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_source_s.cc)
===================================================================
--- gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_s.cc
(rev 0)
+++ gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_s.cc
2008-11-02 23:26:56 UTC (rev 9907)
@@ -0,0 +1,131 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2004,2006 Free Software Foundation, Inc.
+ *
+ * This file is part of GNU Radio
+ *
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ *
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with GNU Radio; see the file COPYING. If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <usrp_source_s.h>
+#include <gr_io_signature.h>
+#include <usrp_standard.h>
+#include <usrp_bytesex.h>
+
+static const int NBASIC_SAMPLES_PER_ITEM = 1;
+
+usrp_source_s_sptr
+usrp_make_source_s (int which_board,
+ unsigned int decim_rate,
+ int nchan,
+ int mux,
+ int mode,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error)
+{
+ return usrp_source_s_sptr (new usrp_source_s (which_board,
+ decim_rate,
+ nchan,
+ mux,
+ mode,
+ fusb_block_size,
+ fusb_nblocks,
+ fpga_filename,
+ firmware_filename
+ ));
+}
+
+
+usrp_source_s::usrp_source_s (int which_board,
+ unsigned int decim_rate,
+ int nchan,
+ int mux,
+ int mode,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error)
+ : usrp_source_base ("usrp_source_s",
+ gr_make_io_signature (1, 1, sizeof (short)),
+ which_board, decim_rate, nchan, mux, mode,
+ fusb_block_size,
+ fusb_nblocks,
+ fpga_filename, firmware_filename)
+{
+}
+
+usrp_source_s::~usrp_source_s ()
+{
+ // NOP
+}
+
+int
+usrp_source_s::ninput_bytes_reqd_for_noutput_items (int noutput_items)
+{
+ return noutput_items * NBASIC_SAMPLES_PER_ITEM * sizeof_basic_sample();
+}
+
+/*
+ * Convert interleaved 8 or 16-bit I & Q from usrp buffer into a single
+ * short output stream.
+ */
+void
+usrp_source_s::copy_from_usrp_buffer (gr_vector_void_star &output_items,
+ int output_index,
+ int output_items_available,
+ int &output_items_produced,
+ const void *usrp_buffer,
+ int usrp_buffer_length,
+ int &bytes_read)
+{
+ short *out = &((short *) output_items[0])[output_index];
+ unsigned sbs = sizeof_basic_sample();
+ unsigned nusrp_bytes_per_item = NBASIC_SAMPLES_PER_ITEM * sbs;
+
+ int nitems = std::min (output_items_available,
+ (int)(usrp_buffer_length / nusrp_bytes_per_item));
+
+ signed char *s8 = (signed char *) usrp_buffer;
+ short *s16 = (short *) usrp_buffer;
+
+ switch(sbs){
+ case 1:
+ for (int i = 0; i < nitems; i++){
+ out[i] = s8[i] << 8;
+ }
+ break;
+
+ case 2:
+ for (int i = 0; i < nitems; i++){
+ out[i] = usrp_to_host_short(s16[i]);
+ }
+ break;
+
+ default:
+ assert(0);
+ }
+
+ output_items_produced = nitems;
+ bytes_read = nitems * nusrp_bytes_per_item;
+}
Copied: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_s.h
(from rev 9905,
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp1_source_s.h)
===================================================================
--- gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_s.h
(rev 0)
+++ gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_s.h
2008-11-02 23:26:56 UTC (rev 9907)
@@ -0,0 +1,94 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2004 Free Software Foundation, Inc.
+ *
+ * This file is part of GNU Radio
+ *
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ *
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with GNU Radio; see the file COPYING. If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#ifndef INCLUDED_USRP1_SOURCE_S_H
+#define INCLUDED_USRP1_SOURCE_S_H
+
+#include <usrp_source_base.h>
+#include <stdexcept>
+
+class usrp_standard_rx;
+
+
+class usrp_source_s;
+typedef boost::shared_ptr<usrp_source_s> usrp_source_s_sptr;
+
+
+// public shared_ptr constructor
+
+usrp_source_s_sptr
+usrp_make_source_s (int which_board,
+ unsigned int decim_rate,
+ int nchan,
+ int mux,
+ int mode,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error);
+
+/*!
+ * \brief interface to Universal Software Radio Peripheral Rx path (Rev 1)
+ *
+ * output: 1 stream of short
+ */
+class usrp_source_s : public usrp_source_base {
+ private:
+ friend usrp_source_s_sptr
+ usrp_make_source_s (int which_board,
+ unsigned int decim_rate,
+ int nchan,
+ int mux,
+ int mode,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error);
+
+ protected:
+ usrp_source_s (int which_board,
+ unsigned int decim_rate,
+ int nchan,
+ int mux,
+ int mode,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error);
+
+ virtual int ninput_bytes_reqd_for_noutput_items (int noutput_items);
+
+ virtual void copy_from_usrp_buffer (gr_vector_void_star &output_items,
+ int output_index,
+ int output_items_available,
+ int &output_items_produced,
+ const void *usrp_buffer,
+ int usrp_buffer_length,
+ int &bytes_read);
+ public:
+ ~usrp_source_s ();
+};
+
+#endif /* INCLUDED_USRP1_SOURCE_S_H */
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