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[Commit-gnuradio] r8922 - usrp2/trunk/fpga/top/u2_core
From: |
matt |
Subject: |
[Commit-gnuradio] r8922 - usrp2/trunk/fpga/top/u2_core |
Date: |
Thu, 17 Jul 2008 12:37:33 -0600 (MDT) |
Author: matt
Date: 2008-07-17 12:37:29 -0600 (Thu, 17 Jul 2008)
New Revision: 8922
Modified:
usrp2/trunk/fpga/top/u2_core/u2_core.v
Log:
generate proper resets for eth mac and changed ports
Modified: usrp2/trunk/fpga/top/u2_core/u2_core.v
===================================================================
--- usrp2/trunk/fpga/top/u2_core/u2_core.v 2008-07-17 18:35:07 UTC (rev
8921)
+++ usrp2/trunk/fpga/top/u2_core/u2_core.v 2008-07-17 18:37:29 UTC (rev
8922)
@@ -404,10 +404,14 @@
wire Rx_mac_empty, Rx_mac_rd, Rx_mac_sop, Rx_mac_eop, Rx_mac_err;
wire [31:0] Tx_mac_data, Rx_mac_data;
wire [1:0] Tx_mac_BE, Rx_mac_BE;
-
+ wire rst_mac;
+
+ oneshot_2clk mac_rst_1shot
(.clk_in(wb_clk),.in(wb_rst),.clk_out(clk_to_mac),.out(rst_mac));
+
MAC_top #(.TX_FF_DEPTH(9), .RX_FF_DEPTH(11))
MAC_top
- (.Clk_125M(clk_to_mac),.Clk_user(dsp_clk),.Speed(),
+ (.Clk_125M(clk_to_mac),.Clk_user(dsp_clk),
+ .rst_mac(rst_mac),.rst_user(dsp_rst),
.RST_I(wb_rst),.CLK_I(wb_clk),.STB_I(s6_stb),.CYC_I(s6_cyc),.ADR_I(s6_adr[8:2]),
.WE_I(s6_we),.DAT_I(s6_dat_o),.DAT_O(s6_dat_i),.ACK_O(s6_ack),
.Rx_mac_empty(Rx_mac_empty),.Rx_mac_rd(Rx_mac_rd),.Rx_mac_data(Rx_mac_data),.Rx_mac_BE(Rx_mac_BE),
@@ -621,10 +625,10 @@
assign debug_clk[0] = wb_clk;
assign debug_clk[1] = dsp_clk;
- //assign debug = {{strobe_rx,/*adc_ovf_a*/ 1'b0,adc_a},
- // {run_rx,/*adc_ovf_b*/ 1'b0,adc_b}};
+ assign debug = {{strobe_rx,/*adc_ovf_a*/ 1'b0,adc_a},
+ {run_rx,/*adc_ovf_b*/ 1'b0,adc_b}};
- assign debug = debug_tx_dsp;
+ //assign debug = debug_tx_dsp;
//assign debug = 0; // debug_serdes0;
assign debug_gpio_0 = 0; // debug_serdes1;
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