[Commit-gnuradio] r8531 - usrp2/trunk/fpga/sdr_lib

[matt]

Author: matt
Date: 2008-05-28 18:43:50 -0600 (Wed, 28 May 2008)
New Revision: 8531

Modified:
   usrp2/trunk/fpga/sdr_lib/dsp_core_rx.v
Log:
includes the halfband decimators!


Modified: usrp2/trunk/fpga/sdr_lib/dsp_core_rx.v
===================================================================
--- usrp2/trunk/fpga/sdr_lib/dsp_core_rx.v      2008-05-29 00:42:53 UTC (rev 
8530)
+++ usrp2/trunk/fpga/sdr_lib/dsp_core_rx.v      2008-05-29 00:43:50 UTC (rev 
8531)
@@ -9,15 +9,25 @@
    
    output [31:0] sample,
    input run,
-   output strobe
+   output strobe,
+   output [31:0] debug
    );
 
    wire [15:0] scale_i, scale_q;
    wire [31:0] phase_inc;
    reg [31:0]  phase;
 
-   wire [23:0] i_decim, q_decim;
-   wire [7:0]  decim_rate;
+   wire [35:0] prod_i, prod_q;
+   wire [23:0] i_cordic, q_cordic;
+   wire [23:0] i_cic, q_cic;
+   wire [17:0] i_cic_scaled, q_cic_scaled;
+   wire [17:0] i_hb1, q_hb1;
+   wire [17:0] i_hb2, q_hb2;
+   wire [15:0] i_out, q_out;
+
+   wire        strobe_cic, strobe_hb1, strobe_hb2;
+   wire        enable_hb1, enable_hb2;
+   wire [7:0]  cic_decim_rate;
    
    setting_reg #(.my_addr(`DSP_CORE_RX_BASE+0)) sr_0
      (.clk(clk),.rst(rst),.strobe(set_stb),.addr(set_addr),
@@ -29,7 +39,7 @@
    
    setting_reg #(.my_addr(`DSP_CORE_RX_BASE+2)) sr_2
      (.clk(clk),.rst(rst),.strobe(set_stb),.addr(set_addr),
-      .in(set_data),.out(decim_rate),.changed());
+      .in(set_data),.out({enable_hb1, enable_hb2, cic_decim_rate}),.changed());
 
    always @(posedge clk)
      if(rst)
@@ -37,13 +47,6 @@
      else if(run)
        phase <= phase + phase_inc;
 
-   wire [23:0] i_bb, q_bb;
-   
-   strobe_gen 
strobe_gen(.clock(clk),.reset(rst),.enable(run),.rate(decim_rate),
-                        .strobe_in(1),.strobe(strobe) );
-
-   wire [35:0] prod_i, prod_q;
-   
    MULT18X18S mult_i
      (.P(prod_i),    // 36-bit multiplier output
       .A({{4{adc_a[13]}},adc_a} ),    // 18-bit multiplier input
@@ -65,22 +68,48 @@
    cordic #(.bitwidth(24))
      cordic(.clock(clk), .reset(rst), .enable(run),
            .xi(prod_i[23:0]),. yi(prod_q[23:0]), .zi(phase[31:16]),
-           .xo(i_bb),.yo(q_bb),.zo() );
+           .xo(i_cordic),.yo(q_cordic),.zo() );
 
+   cic_strober 
cic_strober(.clock(clk),.reset(rst),.enable(run),.rate(cic_decim_rate),
+                          .strobe_fast(1),.strobe_slow(strobe_cic) );
+
    cic_decim #(.bw(24))
      decim_i (.clock(clk),.reset(rst),.enable(run),
-             .rate(decim_rate),.strobe_in(1'b1),.strobe_out(strobe),
-             .signal_in(i_bb),.signal_out(i_decim));
+             .rate(cic_decim_rate),.strobe_in(1'b1),.strobe_out(strobe_cic),
+             .signal_in(i_cordic),.signal_out(i_cic));
    
    cic_decim #(.bw(24))
      decim_q (.clock(clk),.reset(rst),.enable(run),
-             .rate(decim_rate),.strobe_in(1'b1),.strobe_out(strobe),
-             .signal_in(q_bb),.signal_out(q_decim));
+             .rate(cic_decim_rate),.strobe_in(1'b1),.strobe_out(strobe_cic),
+             .signal_in(q_cordic),.signal_out(q_cic));
 
-   wire [15:0] i_out, q_out;
-   round #(.bits_in(24),.bits_out(16)) round_i (.in(i_decim),.out(i_out));
-   round #(.bits_in(24),.bits_out(16)) round_q (.in(q_decim),.out(q_out));
+   round_reg #(.bits_in(24),.bits_out(18)) round_icic 
(.clk(clk),.in(i_cic),.out(i_cic_scaled));
+   round_reg #(.bits_in(24),.bits_out(18)) round_qcic 
(.clk(clk),.in(q_cic),.out(q_cic_scaled));
+   reg                strobe_cic_d1;
+   always @(posedge clk) strobe_cic_d1 <= strobe_cic;
+   
+   small_hb_dec #(.WIDTH(18)) small_hb_i
+     (.clk(clk),.rst(rst),.bypass(~enable_hb1),
+      
.stb_in(strobe_cic_d1),.data_in(i_cic_scaled),.stb_out(strobe_hb1),.data_out(i_hb1));
+   
+   small_hb_dec #(.WIDTH(18)) small_hb_q
+     (.clk(clk),.rst(rst),.bypass(~enable_hb1),
+      
.stb_in(strobe_cic_d1),.data_in(q_cic_scaled),.stb_out(),.data_out(q_hb1));
 
+   wire [8:0]  cpi_hb = enable_hb1 ? {cic_decim_rate,1'b0} : 
{1'b0,cic_decim_rate};
+   hb_dec #(.IWIDTH(18), .OWIDTH(18), .CWIDTH(18), .ACCWIDTH(24)) hb_i
+     (.clk(clk),.rst(rst),.bypass(~enable_hb2),.cpi(cpi_hb),
+      
.stb_in(strobe_hb1),.data_in(i_hb1),.stb_out(strobe_hb2),.data_out(i_hb2));
+
+   hb_dec #(.IWIDTH(18), .OWIDTH(18), .CWIDTH(18), .ACCWIDTH(24)) hb_q
+     (.clk(clk),.rst(rst),.bypass(~enable_hb2),.cpi(cpi_hb),
+      .stb_in(strobe_hb1),.data_in(q_hb1),.stb_out(),.data_out(q_hb2));
+
+   round #(.bits_in(18),.bits_out(16)) round_iout (.in(i_hb2),.out(i_out));
+   round #(.bits_in(18),.bits_out(16)) round_qout (.in(q_hb2),.out(q_out));
+
    assign      sample = {i_out,q_out};
-
+   assign      strobe = strobe_hb2;
+   assign      debug = {enable_hb1, enable_hb2, run, strobe, strobe_cic, 
strobe_cic_d1, strobe_hb1, strobe_hb2};
+   
 endmodule // dsp_core_rx