[Commit-gnuradio] r8523 - usrp2/trunk/firmware/apps

[matt]

Author: matt
Date: 2008-05-28 18:30:33 -0600 (Wed, 28 May 2008)
New Revision: 8523

Modified:
   usrp2/trunk/firmware/apps/app_common.c
   usrp2/trunk/firmware/apps/app_passthru.c
   usrp2/trunk/firmware/apps/ibs_rx_test.c
   usrp2/trunk/firmware/apps/ibs_tx_test.c
   usrp2/trunk/firmware/apps/rx_only.c
   usrp2/trunk/firmware/apps/rx_only_v2.c
   usrp2/trunk/firmware/apps/test1.c
   usrp2/trunk/firmware/apps/tx_only_v2.c
   usrp2/trunk/firmware/apps/tx_standalone.c
Log:
get rid of silly -1 requirement on settings for interp and decim.  requires new 
fpga image


Modified: usrp2/trunk/firmware/apps/app_common.c
===================================================================
--- usrp2/trunk/firmware/apps/app_common.c      2008-05-29 00:29:35 UTC (rev 
8522)
+++ usrp2/trunk/firmware/apps/app_common.c      2008-05-29 00:30:33 UTC (rev 
8523)
@@ -197,5 +197,5 @@
 
   dsp_tx_regs->freq = p->phase_inc;
   dsp_tx_regs->scale_iq = p->scale_iq;
-  dsp_tx_regs->interp_rate = p->interp - 1;    // register gets N-1
+  dsp_tx_regs->interp_rate = p->interp;
 }

Modified: usrp2/trunk/firmware/apps/app_passthru.c
===================================================================
--- usrp2/trunk/firmware/apps/app_passthru.c    2008-05-29 00:29:35 UTC (rev 
8522)
+++ usrp2/trunk/firmware/apps/app_passthru.c    2008-05-29 00:30:33 UTC (rev 
8523)
@@ -145,5 +145,5 @@
 
   dsp_tx_regs->freq = p->phase_inc;
   dsp_tx_regs->scale_iq = p->scale_iq;
-  dsp_tx_regs->interp_rate = p->interp - 1;    // register gets N-1
+  dsp_tx_regs->interp_rate = p->interp;
 }

Modified: usrp2/trunk/firmware/apps/ibs_rx_test.c
===================================================================
--- usrp2/trunk/firmware/apps/ibs_rx_test.c     2008-05-29 00:29:35 UTC (rev 
8522)
+++ usrp2/trunk/firmware/apps/ibs_rx_test.c     2008-05-29 00:30:33 UTC (rev 
8523)
@@ -29,7 +29,7 @@
 
   dsp_rx_regs->freq = 0;
   dsp_rx_regs->scale_iq = (1 << 16) | 1;
-  dsp_rx_regs->decim_rate = 7;
+  dsp_rx_regs->decim_rate = 8;
 
   volatile unsigned int *buffer0 = buffer_ram(0);
   volatile unsigned int *buffer1 = buffer_ram(1);

Modified: usrp2/trunk/firmware/apps/ibs_tx_test.c
===================================================================
--- usrp2/trunk/firmware/apps/ibs_tx_test.c     2008-05-29 00:29:35 UTC (rev 
8522)
+++ usrp2/trunk/firmware/apps/ibs_tx_test.c     2008-05-29 00:30:33 UTC (rev 
8523)
@@ -33,7 +33,7 @@
   
   dsp_tx_regs->freq = 0;
   dsp_tx_regs->scale_iq = (1 << 16) | 1;
-  dsp_tx_regs->interp_rate = 7;
+  dsp_tx_regs->interp_rate = 8;
 
   // Write data to be sent into the first buffer
   volatile unsigned int *buffer0 = buffer_ram(0);

Modified: usrp2/trunk/firmware/apps/rx_only.c
===================================================================
--- usrp2/trunk/firmware/apps/rx_only.c 2008-05-29 00:29:35 UTC (rev 8522)
+++ usrp2/trunk/firmware/apps/rx_only.c 2008-05-29 00:30:33 UTC (rev 8523)
@@ -132,7 +132,7 @@
   //dsp_rx_regs->freq = p->phase_inc;
 
   dsp_rx_regs->scale_iq = p->scale_iq;
-  dsp_rx_regs->decim_rate = p->decim - 1;      // register gets N-1
+  dsp_rx_regs->decim_rate = p->decim;
 
   if (p->total_samples == 0){                  // we're streaming
     streaming_p = true;

Modified: usrp2/trunk/firmware/apps/rx_only_v2.c
===================================================================
--- usrp2/trunk/firmware/apps/rx_only_v2.c      2008-05-29 00:29:35 UTC (rev 
8522)
+++ usrp2/trunk/firmware/apps/rx_only_v2.c      2008-05-29 00:30:33 UTC (rev 
8523)
@@ -130,7 +130,7 @@
   }
 
   if (p->valid & CFGV_INTERP_DECIM){
-    dsp_rx_regs->decim_rate = p->decim - 1;    // register gets N-1
+    dsp_rx_regs->decim_rate = p->decim;
   }
 
   if (p->valid & CFGV_SCALE_IQ){

Modified: usrp2/trunk/firmware/apps/test1.c
===================================================================
--- usrp2/trunk/firmware/apps/test1.c   2008-05-29 00:29:35 UTC (rev 8522)
+++ usrp2/trunk/firmware/apps/test1.c   2008-05-29 00:30:33 UTC (rev 8523)
@@ -47,12 +47,12 @@
   // Set up TX Chain
   dsp_tx_regs->freq = 0;
   dsp_tx_regs->scale_iq = (1 << 16) | 1;
-  dsp_tx_regs->interp_rate = 7;
+  dsp_tx_regs->interp_rate = 8;
 
   // Set up RX Chain
   dsp_rx_regs->freq = 0;
   dsp_rx_regs->scale_iq = (1 << 16) | 1;
-  dsp_rx_regs->decim_rate = 7;
+  dsp_rx_regs->decim_rate = 8;
 
   // Set up buffer control, using only 4 for now
   for(i=0;i<4;i++) 

Modified: usrp2/trunk/firmware/apps/tx_only_v2.c
===================================================================
--- usrp2/trunk/firmware/apps/tx_only_v2.c      2008-05-29 00:29:35 UTC (rev 
8522)
+++ usrp2/trunk/firmware/apps/tx_only_v2.c      2008-05-29 00:30:33 UTC (rev 
8523)
@@ -109,7 +109,7 @@
   }
 
   if (p->valid & CFGV_INTERP_DECIM){
-    dsp_tx_regs->interp_rate = p->interp - 1;  // register gets N-1
+    dsp_tx_regs->interp_rate = p->interp;
   }
 
   if (p->valid & CFGV_SCALE_IQ){
@@ -154,7 +154,7 @@
 
   dsp_tx_regs->freq = 0;
   dsp_tx_regs->scale_iq = (tx_scale << 16) | tx_scale;
-  dsp_tx_regs->interp_rate = interp - 1;               // register gets N-1
+  dsp_tx_regs->interp_rate = interp;
 }
 
 

Modified: usrp2/trunk/firmware/apps/tx_standalone.c
===================================================================
--- usrp2/trunk/firmware/apps/tx_standalone.c   2008-05-29 00:29:35 UTC (rev 
8522)
+++ usrp2/trunk/firmware/apps/tx_standalone.c   2008-05-29 00:30:33 UTC (rev 
8523)
@@ -210,7 +210,7 @@
   dsp_tx_regs->clear_state = 1;                        // reset
   dsp_tx_regs->freq = 408021893;               // 9.5 MHz [2**32 * fc/fsample]
   dsp_tx_regs->scale_iq = (tx_scale << 16) | tx_scale;
-  dsp_tx_regs->interp_rate = 31;               // register gets N - 1
+  dsp_tx_regs->interp_rate = 32;
 
   // kick off the state machine
   // dbsm_start(&dsp_rx_sm);