[Commit-gnuradio] r8406 - in usrp2/branches/developers/eb/u2-newpktfmt/firmware: apps lib

[eb]

Author: eb
Date: 2008-05-11 23:32:16 -0600 (Sun, 11 May 2008)
New Revision: 8406

Added:
   usrp2/branches/developers/eb/u2-newpktfmt/firmware/apps/txrx.c
Modified:
   usrp2/branches/developers/eb/u2-newpktfmt/firmware/apps/
   usrp2/branches/developers/eb/u2-newpktfmt/firmware/apps/Makefile.am
   usrp2/branches/developers/eb/u2-newpktfmt/firmware/apps/app_common_v2.c
   usrp2/branches/developers/eb/u2-newpktfmt/firmware/apps/app_common_v2.h
   usrp2/branches/developers/eb/u2-newpktfmt/firmware/apps/rx_only_v2.c
   usrp2/branches/developers/eb/u2-newpktfmt/firmware/lib/dbsm.c
   usrp2/branches/developers/eb/u2-newpktfmt/firmware/lib/dbsm.h
Log:
simultaneous tx and rx is working :-)


Property changes on: usrp2/branches/developers/eb/u2-newpktfmt/firmware/apps
___________________________________________________________________
Name: svn:ignore
   - *-stamp
*.a
*.bin
*.dump
*.log
*.rom
*.map
.deps
Makefile
Makefile.in
aclocal.m4
autom4te.cache
blink_leds
blink_leds2
build
compile
config.h
config.h.in
config.log
config.status
configure
depcomp
eth_test
gen_eth_packets
ibs_rx_test
ibs_tx_test
install-sh
libtool
ltmain.sh
missing
py-compile
rcv_eth_packets
run_tests.sh
stamp-h1
test1
test_phy_comm
timer_test
buf_ram_test
buf_ram_zero
hello
test_printf
test_spi
test_i2c
gen_pause_frames
test_serdes
rx_only
tx_only
tx_standalone
tx_drop
tx_drop2
tx_drop_rate_limited
test_lsdac
test_lsadc
read_dbids
test_db_spi
ramp_lsdac
eth_to_serdes
serdes_to_dsp
sd_gentest
sd_bounce
can_i_sub
tx_only_v2
rx_only_v2

   + *-stamp
*.a
*.bin
*.dump
*.log
*.rom
*.map
.deps
Makefile
Makefile.in
aclocal.m4
autom4te.cache
blink_leds
blink_leds2
build
compile
config.h
config.h.in
config.log
config.status
configure
depcomp
eth_test
gen_eth_packets
ibs_rx_test
ibs_tx_test
install-sh
libtool
ltmain.sh
missing
py-compile
rcv_eth_packets
run_tests.sh
stamp-h1
test1
test_phy_comm
timer_test
buf_ram_test
buf_ram_zero
hello
test_printf
test_spi
test_i2c
gen_pause_frames
test_serdes
rx_only
tx_only
tx_standalone
tx_drop
tx_drop2
tx_drop_rate_limited
test_lsdac
test_lsadc
read_dbids
test_db_spi
ramp_lsdac
eth_to_serdes
serdes_to_dsp
sd_gentest
sd_bounce
can_i_sub
tx_only_v2
rx_only_v2
txrx


Modified: usrp2/branches/developers/eb/u2-newpktfmt/firmware/apps/Makefile.am
===================================================================
--- usrp2/branches/developers/eb/u2-newpktfmt/firmware/apps/Makefile.am 
2008-05-12 04:01:47 UTC (rev 8405)
+++ usrp2/branches/developers/eb/u2-newpktfmt/firmware/apps/Makefile.am 
2008-05-12 05:32:16 UTC (rev 8406)
@@ -43,6 +43,7 @@
        tx_only \
        tx_only_v2 \
        tx_standalone \
+       txrx \
        eth_to_serdes \
        serdes_to_dsp \
        sd_gentest \
@@ -56,6 +57,7 @@
 rx_only_SOURCES = rx_only.c app_common.c
 rx_only_v2_SOURCES = rx_only_v2.c app_common_v2.c
 tx_only_v2_SOURCES = tx_only_v2.c app_common_v2.c
+txrx_SOURCES = txrx.c app_common_v2.c
 eth_to_serdes_SOURCES = eth_to_serdes.c app_passthru.c
 serdes_to_dsp_SOURCES = serdes_to_dsp.c app_common.c
 

Modified: 
usrp2/branches/developers/eb/u2-newpktfmt/firmware/apps/app_common_v2.c
===================================================================
--- usrp2/branches/developers/eb/u2-newpktfmt/firmware/apps/app_common_v2.c     
2008-05-12 04:01:47 UTC (rev 8405)
+++ usrp2/branches/developers/eb/u2-newpktfmt/firmware/apps/app_common_v2.c     
2008-05-12 05:32:16 UTC (rev 8406)
@@ -30,6 +30,10 @@
 
 volatile bool link_is_up = false;      // eth handler sets this
 
+
+// If this is non-zero, this dbsm could be writing to the ethernet
+dbsm_t *ac_could_be_sending_to_eth;
+
 static unsigned char exp_seqno = 0;
 
 
@@ -64,7 +68,19 @@
 
   // copy reply into CPU_TX_BUF
   memcpy_wa(buffer_ram(CPU_TX_BUF), reply, reply_len);
+
+  // wait until nobody else is sending to the ethernet
+  if (ac_could_be_sending_to_eth)
+    dbsm_wait_for_opening(ac_could_be_sending_to_eth);
+
+  // fire it off
   bp_send_from_buf(CPU_TX_BUF, PORT_ETH, 1, 0, reply_len/4);
+
+  // wait for it to complete (not long, it's a small pkt)
+  while((buffer_pool_status->status & (BPS_DONE(CPU_TX_BUF) | 
BPS_ERROR(CPU_TX_BUF))) == 0)
+    ;
+
+  bp_clear_buf(CPU_TX_BUF);
 }
 
 

Modified: 
usrp2/branches/developers/eb/u2-newpktfmt/firmware/apps/app_common_v2.h
===================================================================
--- usrp2/branches/developers/eb/u2-newpktfmt/firmware/apps/app_common_v2.h     
2008-05-12 04:01:47 UTC (rev 8405)
+++ usrp2/branches/developers/eb/u2-newpktfmt/firmware/apps/app_common_v2.h     
2008-05-12 05:32:16 UTC (rev 8406)
@@ -33,6 +33,11 @@
 
 extern volatile bool link_is_up;       // eth handler sets this
 
+
+// If there's a dbsm that sends to the ethernet, put it's address here
+extern dbsm_t *ac_could_be_sending_to_eth;
+
+
 void set_reply_hdr(u2_eth_packet_t *reply_pkt, u2_eth_packet_t const *cmd_pkt);
 
 /*

Modified: usrp2/branches/developers/eb/u2-newpktfmt/firmware/apps/rx_only_v2.c
===================================================================
--- usrp2/branches/developers/eb/u2-newpktfmt/firmware/apps/rx_only_v2.c        
2008-05-12 04:01:47 UTC (rev 8405)
+++ usrp2/branches/developers/eb/u2-newpktfmt/firmware/apps/rx_only_v2.c        
2008-05-12 05:32:16 UTC (rev 8406)
@@ -110,7 +110,7 @@
   // FIXME nop
 }
 
-void 
+void
 config_rx_v2_cmd(op_config_rx_v2_t *p)
 {
   struct tune_result   tune_result;

Copied: usrp2/branches/developers/eb/u2-newpktfmt/firmware/apps/txrx.c (from 
rev 8405, usrp2/branches/developers/eb/u2-newpktfmt/firmware/apps/tx_only_v2.c)
===================================================================
--- usrp2/branches/developers/eb/u2-newpktfmt/firmware/apps/txrx.c              
                (rev 0)
+++ usrp2/branches/developers/eb/u2-newpktfmt/firmware/apps/txrx.c      
2008-05-12 05:32:16 UTC (rev 8406)
@@ -0,0 +1,383 @@
+/*
+ * Copyright 2007,2008 Free Software Foundation, Inc.
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "u2_init.h"
+#include "memory_map.h"
+#include "spi.h"
+#include "hal_io.h"
+#include "buffer_pool.h"
+#include "pic.h"
+#include "bool.h"
+#include "ethernet.h"
+#include "nonstdio.h"
+#include "usrp2_eth_packet.h"
+#include "dbsm.h"
+#include "app_common_v2.h"
+#include "memcpy_wa.h"
+#include <stddef.h>
+#include <stdlib.h>
+#include <string.h>
+#include <db.h>
+#include <db_base.h>
+
+
+#define FW_SETS_SEQNO  1       // define to 0 or 1 (FIXME must be 1 for now)
+
+#if (FW_SETS_SEQNO)
+static int fw_seqno;   // used when f/w is filling in sequence numbers
+#endif
+
+
+/*
+ * Full duplex Tx and Rx between ethernet and DSP pipelines
+ *
+ * Buffer 1 is used by the cpu to send frames to the host.
+ * Buffers 2 and 3 are used to double-buffer the DSP Rx to eth flow
+ * Buffers 4 and 5 are used to double-buffer the eth to DSP Tx  eth flow
+ */
+//#define CPU_RX_BUF   0       // eth -> cpu
+
+#define        DSP_RX_BUF_0    2       // dsp rx -> eth (double buffer)
+#define        DSP_RX_BUF_1    3       // dsp rx -> eth
+#define        DSP_TX_BUF_0    4       // eth -> dsp tx (double buffer)
+#define        DSP_TX_BUF_1    5       // eth -> dsp tx
+
+/*
+ * ================================================================
+ *   configure DSP TX double buffering state machine (eth -> dsp)
+ * ================================================================
+ */
+
+// 4 lines of ethernet hdr + 1 line transport hdr + 2 lines (word0 + timestamp)
+// DSP Tx reads word0 (flags) + timestamp followed by samples
+
+#define DSP_TX_FIRST_LINE ((sizeof(u2_eth_hdr_t) + 
sizeof(u2_transport_hdr_t))/4)
+
+// Receive from ethernet
+buf_cmd_args_t dsp_tx_recv_args = {
+  PORT_ETH,
+  0,
+  BP_LAST_LINE
+};
+
+// send to DSP Tx
+buf_cmd_args_t dsp_tx_send_args = {
+  PORT_DSP,
+  DSP_TX_FIRST_LINE,   // starts just past transport header
+  0                    // filled in from last_line register
+};
+
+dbsm_t dsp_tx_sm;      // the state machine
+
+/*
+ * ================================================================
+ *   configure DSP RX double buffering state machine (dsp -> eth)
+ * ================================================================
+ */
+
+// 4 lines of ethernet hdr + 1 line transport hdr + 1 line (word0)
+// DSP Rx writes timestamp followed by nlines_per_frame of samples
+#define DSP_RX_FIRST_LINE ((sizeof(u2_eth_hdr_t) + 
sizeof(u2_transport_hdr_t))/4 + 1)
+
+// receive from DSP
+buf_cmd_args_t dsp_rx_recv_args = {
+  PORT_DSP,
+  DSP_RX_FIRST_LINE,
+  BP_LAST_LINE
+};
+
+// send to ETH
+buf_cmd_args_t dsp_rx_send_args = {
+  PORT_ETH,
+  0,           // starts with ethernet header in line 0
+  0,           // filled in from list_line register
+};
+
+dbsm_t dsp_rx_sm;      // the state machine
+
+
+// The mac address of the host we're sending to.
+u2_mac_addr_t host_mac_addr;
+
+
+// variables for streaming mode
+
+static bool     streaming_p = false;
+static int      streaming_frame_count = 0;
+#define FRAMES_PER_CMD 1000
+
+
+// ----------------------------------------------------------------
+
+
+
+void 
+config_tx_v2_cmd(op_config_tx_v2_t *p)
+{
+  struct tune_result   tune_result;
+  memset(&tune_result, 0, sizeof(tune_result));
+
+  bool ok = true;
+  
+  if (p->valid & CFGV_GAIN){
+    ok &= tx_dboard->set_gain(tx_dboard, p->gain);
+  }
+
+  if (p->valid & CFGV_FREQ){
+    u2_fxpt_freq_t f = u2_fxpt_freq_from_hilo(p->freq_hi, p->freq_lo);
+    bool tune_ok = db_tune(tx_dboard, f, &tune_result);
+    ok &= tune_ok;
+    print_tune_result("Tx", tune_ok, f, &tune_result);
+  }
+
+  if (p->valid & CFGV_INTERP_DECIM){
+    dsp_tx_regs->interp_rate = p->interp - 1;  // register gets N-1
+  }
+
+  if (p->valid & CFGV_SCALE_IQ){
+    dsp_tx_regs->scale_iq = p->scale_iq;
+  }
+
+  // FIXME build and send reply
+}
+
+void
+config_rx_v2_cmd(op_config_rx_v2_t *p)
+{
+  struct tune_result   tune_result;
+  memset(&tune_result, 0, sizeof(tune_result));
+
+  bool ok = true;
+  
+  if (p->valid & CFGV_GAIN){
+    ok &= rx_dboard->set_gain(rx_dboard, p->gain);
+  }
+
+  if (p->valid & CFGV_FREQ){
+    u2_fxpt_freq_t f = u2_fxpt_freq_from_hilo(p->freq_hi, p->freq_lo);
+    bool tune_ok = db_tune(rx_dboard, f, &tune_result);
+    ok &= tune_ok;
+    print_tune_result("Rx", tune_ok, f, &tune_result);
+  }
+
+  if (p->valid & CFGV_INTERP_DECIM){
+    dsp_rx_regs->decim_rate = p->decim - 1;    // register gets N-1
+  }
+
+  if (p->valid & CFGV_SCALE_IQ){
+    dsp_rx_regs->scale_iq = p->scale_iq;
+  }
+
+  // FIXME build and send reply
+}
+
+
+void
+start_rx_streaming_cmd(const u2_mac_addr_t *host, op_start_rx_streaming_t *p)
+{
+  host_mac_addr = *host;       // remember who we're sending to
+
+  /*
+   * Construct  ethernet header and word0 and preload into two buffers
+   */
+  u2_eth_packet_t      pkt;
+  memset(&pkt, 0, sizeof(pkt));
+  pkt.ehdr.dst = *host;
+  pkt.ehdr.ethertype = U2_ETHERTYPE;
+  u2p_set_word0(&pkt.fixed, 0, 0);
+  // DSP RX will fill in timestamp
+
+  memcpy_wa(buffer_ram(DSP_RX_BUF_0), &pkt, sizeof(pkt));
+  memcpy_wa(buffer_ram(DSP_RX_BUF_1), &pkt, sizeof(pkt));
+
+
+  if (FW_SETS_SEQNO)
+    fw_seqno = 0;
+
+  // setup RX DSP regs
+  dsp_rx_regs->clear_state = 1;                        // reset
+
+  if (1){                      // we're streaming
+    streaming_p = true;
+    streaming_frame_count = FRAMES_PER_CMD;
+    dsp_rx_regs->rx_command =
+      MK_RX_CMD(FRAMES_PER_CMD * p->items_per_frame, p->items_per_frame,
+               1, 1);                  // set "chain" bit
+
+    // kick off the state machine
+    dbsm_start(&dsp_rx_sm);
+    dsp_rx_regs->rx_time = 0;          // enqueue first of two commands
+
+    // make sure this one and the rest have the "now" and "chain" bits set.
+    dsp_rx_regs->rx_command =
+      MK_RX_CMD(FRAMES_PER_CMD * p->items_per_frame, p->items_per_frame,
+               1, 1);                          
+    dsp_rx_regs->rx_time = 0;          // enqueue second command
+  }
+#if 0
+  else {
+    streaming_p = false;
+    dsp_rx_regs->rx_command =
+      MK_RX_CMD(p->total_samples, p->items_per_frame, p->rx_now, 0);
+
+    // kick off the state machine
+    dbsm_start(&dsp_rx_sm);
+    dsp_rx_regs->rx_time = p->rx_time;
+  }
+#endif
+}
+
+
+void
+stop_rx_cmd(void)
+{
+  streaming_p = false;
+  dsp_rx_regs->clear_state = 1;        // flush cmd queue
+  bp_clear_buf(DSP_RX_BUF_0);
+  bp_clear_buf(DSP_RX_BUF_1);
+}
+
+
+static void
+setup_tx()
+{
+  dsp_tx_regs->clear_state = 1;
+  bp_clear_buf(DSP_TX_BUF_0);
+  bp_clear_buf(DSP_TX_BUF_1);
+
+  int tx_scale = 256;
+  int interp = 32;
+
+  // setup some defaults
+
+  dsp_tx_regs->freq = 0;
+  dsp_tx_regs->scale_iq = (tx_scale << 16) | tx_scale;
+  dsp_tx_regs->interp_rate = interp - 1;               // register gets N-1
+}
+
+
+#if (FW_SETS_SEQNO)
+/*
+ * Debugging ONLY.  This will be handled by the tx_protocol_engine.
+ *
+ * This is called when the DSP Rx chain has filled in a packet.
+ * We set and increment the seqno, then return false, indicating
+ * that we didn't handle the packet.  A bit of a kludge
+ * but it should work.
+ */
+bool 
+fw_sets_seqno_inspector(dbsm_t *sm, int buf_this)      // returns false
+{
+  uint32_t *p = buffer_ram(buf_this);
+  uint32_t seqno = fw_seqno++;
+
+  // KLUDGE all kinds of nasty magic numbers and embedded knowledge
+  uint32_t t = p[4];
+  t = (t & 0xffff00ff) | ((seqno & 0xff) << 8);
+  p[4] = t;
+
+  // queue up another rx command when required
+  if (streaming_p && --streaming_frame_count == 0){
+    streaming_frame_count = FRAMES_PER_CMD;
+    dsp_rx_regs->rx_time = 0;
+  }
+
+  return false;                // we didn't handle the packet
+}
+#endif
+
+
+inline static void
+buffer_irq_handler(unsigned irq)
+{
+  //hal_toggle_leds(0x2);
+
+  uint32_t  status = buffer_pool_status->status;
+
+  dbsm_process_status(&dsp_tx_sm, status);
+  dbsm_process_status(&dsp_rx_sm, status);
+
+#if 0 // not needed, we busy wait in app_common_v2  
+  if (status & BPS_DONE(CPU_TX_BUF)){
+    bp_clear_buf(CPU_TX_BUF);
+  }
+#endif
+
+}
+
+int
+main(void)
+{
+  u2_init();
+
+  putstr("\nTxRx\n");
+
+  ethernet_register_link_changed_callback(link_changed_callback);
+  ethernet_init();
+
+  // initialize double buffering state machine for ethernet -> DSP Tx
+
+  dbsm_init(&dsp_tx_sm, DSP_TX_BUF_0,
+           &dsp_tx_recv_args, &dsp_tx_send_args,
+           eth_pkt_inspector);
+
+
+  // initialize double buffering state machine for DSP RX -> Ethernet
+
+  if (FW_SETS_SEQNO){
+    dbsm_init(&dsp_rx_sm, DSP_RX_BUF_0,
+             &dsp_rx_recv_args, &dsp_rx_send_args,
+             fw_sets_seqno_inspector);
+  }
+  else {
+    dbsm_init(&dsp_rx_sm, DSP_RX_BUF_0,
+             &dsp_rx_recv_args, &dsp_rx_send_args,
+             dbsm_nop_inspector);
+  }
+
+  // tell app_common that this dbsm could be sending to the ethernet
+  ac_could_be_sending_to_eth = &dsp_rx_sm;
+
+
+  // program tx registers
+  setup_tx();
+
+  // kick off the state machine
+  dbsm_start(&dsp_tx_sm);
+
+  while(1){
+    buffer_irq_handler(0);
+
+    int pending = pic_regs->pending;           // poll for under or overrun
+
+    if (pending & PIC_UNDERRUN_INT){
+      dbsm_handle_tx_underrun(&dsp_tx_sm);
+      pic_regs->pending = PIC_UNDERRUN_INT;    // clear interrupt
+      putchar('U');
+    }
+
+    if (pending & PIC_OVERRUN_INT){
+      dbsm_handle_rx_overrun(&dsp_rx_sm);
+      pic_regs->pending = PIC_OVERRUN_INT;     // clear pending interrupt
+      putchar('O');
+    }
+  }
+}

Modified: usrp2/branches/developers/eb/u2-newpktfmt/firmware/lib/dbsm.c
===================================================================
--- usrp2/branches/developers/eb/u2-newpktfmt/firmware/lib/dbsm.c       
2008-05-12 04:01:47 UTC (rev 8405)
+++ usrp2/branches/developers/eb/u2-newpktfmt/firmware/lib/dbsm.c       
2008-05-12 05:32:16 UTC (rev 8406)
@@ -278,3 +278,20 @@
 
   putchar('O');
 }
+
+void 
+dbsm_wait_for_opening(dbsm_t *sm)
+{
+  if (buffer_state[sm->buf0] == BS_EMPTYING){
+    // wait for xfer to complete
+    int mask = BPS_DONE(sm->buf0) | BPS_ERROR(sm->buf0);
+    while ((buffer_pool_status->status & mask) == 0)
+      ;
+  }
+  else if (buffer_state[sm->buf0 ^ 1] == BS_EMPTYING){
+    // wait for xfer to complete
+    int mask = BPS_DONE(sm->buf0 ^ 1) | BPS_ERROR(sm->buf0 ^ 1);
+    while ((buffer_pool_status->status & mask) == 0)
+      ;
+  }
+}

Modified: usrp2/branches/developers/eb/u2-newpktfmt/firmware/lib/dbsm.h
===================================================================
--- usrp2/branches/developers/eb/u2-newpktfmt/firmware/lib/dbsm.h       
2008-05-12 04:01:47 UTC (rev 8405)
+++ usrp2/branches/developers/eb/u2-newpktfmt/firmware/lib/dbsm.h       
2008-05-12 05:32:16 UTC (rev 8406)
@@ -74,4 +74,17 @@
 void dbsm_handle_tx_underrun(dbsm_t *sm);
 void dbsm_handle_rx_overrun(dbsm_t *sm);
 
+/*
+ * The cpu calls this when it want to ensure that it can send a buffer
+ * to the same destination being used by this state machine.
+ *
+ * If neither buffer is EMPTYING it returns immediately.  If a buffer
+ * is EMPYTING, it waits for the h/w to transition to the DONE or
+ * ERROR state.
+ *
+ * When this function returns, the caller queues it's buffer and busy
+ * waits for it to complete.
+ */
+void dbsm_wait_for_opening(dbsm_t *sm);
+
 #endif /* INCLUDED_DBSM_H */