[Commit-gnuradio] r8353 - in usrp2/trunk/fpga: control_lib top/u2_core

[matt]

Author: matt
Date: 2008-05-09 17:34:54 -0600 (Fri, 09 May 2008)
New Revision: 8353

Modified:
   usrp2/trunk/fpga/control_lib/atr_controller.v
   usrp2/trunk/fpga/top/u2_core/u2_core.v
Log:
corrected addressing problem on atr WB bus, plus added byte writability


Modified: usrp2/trunk/fpga/control_lib/atr_controller.v
===================================================================
--- usrp2/trunk/fpga/control_lib/atr_controller.v       2008-05-09 22:43:37 UTC 
(rev 8352)
+++ usrp2/trunk/fpga/control_lib/atr_controller.v       2008-05-09 23:34:54 UTC 
(rev 8353)
@@ -5,7 +5,7 @@
 
 module atr_controller
   (input clk_i, input rst_i,
-   input [3:0] adr_i, input [31:0] dat_i, output [31:0] dat_o,
+   input [5:0] adr_i, input [3:0] sel_i, input [31:0] dat_i, output [31:0] 
dat_o,
    input we_i, input stb_i, input cyc_i, output reg ack_o,
    input run_rx, input run_tx, input [31:0] master_time,
    output [31:0] ctrl_lines);
@@ -16,9 +16,18 @@
    // WB Interface
    always @(posedge clk_i)
      if(we_i & stb_i & cyc_i)
-       atr_ram[adr_i] <= dat_i;
-
-   assign     dat_o = atr_ram[adr_i];
+       begin
+         if(sel_i[3])
+           atr_ram[adr_i[5:2]][31:24] <= dat_i[31:24];
+         if(sel_i[2])
+           atr_ram[adr_i[5:2]][23:16] <= dat_i[23:16];
+         if(sel_i[1])
+           atr_ram[adr_i[5:2]][15:8] <= dat_i[15:8];
+         if(sel_i[0])
+           atr_ram[adr_i[5:2]][7:0] <= dat_i[7:0];
+       end // if (we_i & stb_i & cyc_i)
+   
+   assign     dat_o = atr_ram[adr_i[5:2]];
    always @(posedge clk_i)
      ack_o <= stb_i & cyc_i & ~ack_o;
 

Modified: usrp2/trunk/fpga/top/u2_core/u2_core.v
===================================================================
--- usrp2/trunk/fpga/top/u2_core/u2_core.v      2008-05-09 22:43:37 UTC (rev 
8352)
+++ usrp2/trunk/fpga/top/u2_core/u2_core.v      2008-05-09 23:34:54 UTC (rev 
8353)
@@ -482,7 +482,7 @@
    wire         run_rx, run_tx;
    atr_controller atr_controller
      (.clk_i(wb_clk),.rst_i(wb_rst),
-      .adr_i(s11_adr[3:0]),.dat_i(s11_dat_o),.dat_o(s11_dat_i),
+      .adr_i(s11_adr[5:0]),.sel_i(s11_sel),.dat_i(s11_dat_o),.dat_o(s11_dat_i),
       .we_i(s11_we),.stb_i(s11_stb),.cyc_i(s11_cyc),.ack_o(s11_ack),
       .run_rx(run_rx),.run_tx(run_tx),.ctrl_lines(atr_lines) );
    assign       s11_err = 0;