[Commit-gnuradio] r7576 - usrp2/branches/developers/matt/newfifo/fpga/top/u2_fpga

[matt]

Author: matt
Date: 2008-02-05 14:30:19 -0700 (Tue, 05 Feb 2008)
New Revision: 7576

Modified:
   usrp2/branches/developers/matt/newfifo/fpga/top/u2_fpga/u2_fpga.ise
   usrp2/branches/developers/matt/newfifo/fpga/top/u2_fpga/u2_fpga_top.prj
Log:
updated to use the coregen directory


Modified: usrp2/branches/developers/matt/newfifo/fpga/top/u2_fpga/u2_fpga.ise
===================================================================
(Binary files differ)

Modified: 
usrp2/branches/developers/matt/newfifo/fpga/top/u2_fpga/u2_fpga_top.prj
===================================================================
--- usrp2/branches/developers/matt/newfifo/fpga/top/u2_fpga/u2_fpga_top.prj     
2008-02-05 21:29:37 UTC (rev 7575)
+++ usrp2/branches/developers/matt/newfifo/fpga/top/u2_fpga/u2_fpga_top.prj     
2008-02-05 21:30:19 UTC (rev 7576)
@@ -2,9 +2,9 @@
 verilog work "../../control_lib/ram_2port.v"
 verilog work "../../opencores/uart16550/rtl/verilog/uart_tfifo.v"
 verilog work "../../opencores/uart16550/rtl/verilog/uart_rfifo.v"
+verilog work "../../coregen/fifo_generator_v4_1.v"
 verilog work "../../control_lib/shortfifo.v"
 verilog work "../../control_lib/longfifo.v"
-verilog work "../../../../coregen/fifo_generator_v4_1.v"
 verilog work "../../sdr_lib/sign_extend.v"
 verilog work "../../sdr_lib/cordic_stage.v"
 verilog work "../../sdr_lib/cic_int_shifter.v"