[Commit-gnuradio] r7415 - in usrp2/trunk/firmware: apps lib

[eb]

Author: eb
Date: 2008-01-13 12:52:02 -0700 (Sun, 13 Jan 2008)
New Revision: 7415

Modified:
   usrp2/trunk/firmware/apps/gen_eth_packets.c
   usrp2/trunk/firmware/apps/tx_only.c
   usrp2/trunk/firmware/lib/memory_map.h
Log:
gen_eth_packets now discards any ethernet packets it receives.


Modified: usrp2/trunk/firmware/apps/gen_eth_packets.c
===================================================================
--- usrp2/trunk/firmware/apps/gen_eth_packets.c 2008-01-13 19:38:29 UTC (rev 
7414)
+++ usrp2/trunk/firmware/apps/gen_eth_packets.c 2008-01-13 19:52:02 UTC (rev 
7415)
@@ -54,14 +54,11 @@
 
 int packet_number = 0;
 
-// ----------------------------------------------------------------
 
-// debugging output on tx pins
-#define LS_MASK  0xE0000
-#define LS_1000  0x80000
-#define LS_100   0x40000
-#define LS_10    0x20000
+#define CPU_TX_BUF     0       // cpu xmits ethernet frames from here
+#define CPU_RX_BUF     1       // receive ethernet frames here
 
+// ----------------------------------------------------------------
 
 /*
  * Called when eth phy state changes (w/ interrupts disabled)
@@ -69,35 +66,9 @@
 void
 link_changed_callback(int speed)
 {
-  int v = 0;
-  switch(speed){
-  case 10:
-    v = LS_10;
-    link_is_up = true;
-    break;
-    
-  case 100:
-    v = LS_100;
-    link_is_up = true;
-    break;
-    
-  case 1000:
-    v = LS_100;
-    link_is_up = true;
-    break;
-
-  default:
-    v = 0;
-    link_is_up = false;
-    break;
-  }
-
-  hal_gpio_set_tx(v, LS_MASK); /* set debug bits on d'board */
-
+  link_is_up = speed == 0 ? false : true;
   hal_set_leds(link_is_up ? 0x2 : 0x0, 0x2);
-
-  putstr("\neth link changed: speed = ");
-  puthex16_nl(speed);
+  printf("\neth link changed: speed = %d\n", speed);
 }
 
 void
@@ -108,13 +79,6 @@
 }
 
 
-void
-buffer_irq_handler(unsigned irq)
-{
-  // FIXME
-}
-
-
 static void
 init_packet(int *buf, const u2_eth_packet_t *pkt, int bufnum)
 {
@@ -133,8 +97,6 @@
 static void
 init_packets(void)
 {
-  int  i;
-  
   u2_eth_packet_t      pkt __attribute__((aligned (4)));
 
   pkt.ehdr.dst = dst_mac_addr;
@@ -146,7 +108,7 @@
   pkt.fixed.timestamp = 0xffffffff;
 
   // init just the one we're using
-  init_packet((void *)buffer_ram(0), &pkt, i);
+  init_packet((void *)buffer_ram(CPU_TX_BUF), &pkt, CPU_TX_BUF);
 }
 
 int
@@ -155,47 +117,52 @@
   u2_init();
 
   // setup tx gpio bits for GPIOM_FPGA_1 -- fpga debug output
-  hal_gpio_set_tx_mode(15, 0, GPIOM_FPGA_0);
-  hal_gpio_set_rx_mode(15, 0, GPIOM_FPGA_0);   // no printing...
+  hal_gpio_set_tx_mode(15, 0, GPIOM_FPGA_1);
+  hal_gpio_set_rx_mode(15, 0, GPIOM_FPGA_1);
 
   putstr("\ngen_eth_packets\n");
   
-  // Control LEDs
   hal_set_leds(0x0, 0x3);
 
   init_packets();
 
-  // pic_register_handler(IRQ_BUFFER, buffer_irq_handler);  // poll for now
   pic_register_handler(IRQ_TIMER, timer_irq_handler);
 
-
   if (hwconfig_simulation_p())
     timer_delta = sim_timer_delta;
 
   hal_set_timeout(timer_delta);
 
   ethernet_register_link_changed_callback(link_changed_callback);
-
   ethernet_init();
 
   if (hwconfig_simulation_p()){
-    eth_mac->speed = 4;        // FIXME hardcode mac speed to 1000
+    eth_mac->speed = 4;        // hardcode mac speed to 1000
     link_is_up = true;
   }
 
+  // fire off a receive from the ethernet
+  bp_receive_to_buf(CPU_RX_BUF, PORT_ETH, 1, 0, BP_LAST_LINE);
+
   while(1){
-    if (link_is_up && send_packet_now){
+    uint32_t status = buffer_pool_status->status;
+
+    if (status & (BPS_DONE(CPU_RX_BUF) | BPS_ERROR(CPU_RX_BUF))){
+      bp_clear_buf(CPU_RX_BUF);
+      // ignore incoming ethernet packets; they were looped back in sim
+      bp_receive_to_buf(CPU_RX_BUF, PORT_ETH, 1, 0, BP_LAST_LINE);
+    }
+
+    if (status & (BPS_DONE(CPU_TX_BUF) | BPS_ERROR(CPU_TX_BUF)))
+      bp_clear_buf(CPU_TX_BUF);
+
+    if (link_is_up && send_packet_now && (status & BPS_IDLE(CPU_TX_BUF))){
       send_packet_now = false;
 
       // kick off the next packet
       // FIXME set packet number in packet
 
-      bp_send_from_buf(0, PORT_ETH, 1, 0, 255);        // 1KB total
-
-      while ((buffer_pool_status->status & (BPS_DONE_0|BPS_ERROR_0)) == 0)
-       ;
-      bp_clear_buf(0);
-
+      bp_send_from_buf(CPU_TX_BUF, PORT_ETH, 1, 0, 255);       // 1KB total
       hal_toggle_leds(0x1);
     }
   }

Modified: usrp2/trunk/firmware/apps/tx_only.c
===================================================================
--- usrp2/trunk/firmware/apps/tx_only.c 2008-01-13 19:38:29 UTC (rev 7414)
+++ usrp2/trunk/firmware/apps/tx_only.c 2008-01-13 19:52:02 UTC (rev 7415)
@@ -182,6 +182,8 @@
 
   if (status & BPS_ERROR_ALL){
     // FIXME rare path, handle error conditions
+    putstr("Errors! status = ");
+    puthex32_nl(status);
   }
 
   dbsm_process_status(&dsp_tx_sm, status);

Modified: usrp2/trunk/firmware/lib/memory_map.h
===================================================================
--- usrp2/trunk/firmware/lib/memory_map.h       2008-01-13 19:38:29 UTC (rev 
7414)
+++ usrp2/trunk/firmware/lib/memory_map.h       2008-01-13 19:52:02 UTC (rev 
7415)
@@ -170,7 +170,11 @@
 
 #define buffer_pool_status ((buffer_pool_status_t *) BUFFER_POOL_STATUS_BASE)
 
-#define BPS_DONE(n)     (0x00000001 << (n)) // buffer n xfer is done
+/*
+ * Buffer n's xfer is done.
+ * Clear this bit by issuing bp_clear_buf(n)
+ */
+#define BPS_DONE(n)     (0x00000001 << (n))
 #define BPS_DONE_0     BPS_DONE(0)
 #define BPS_DONE_1     BPS_DONE(1)
 #define BPS_DONE_2     BPS_DONE(2)
@@ -180,7 +184,11 @@
 #define BPS_DONE_6     BPS_DONE(6)
 #define BPS_DONE_7     BPS_DONE(7)
 
-#define BPS_ERROR(n)   (0x00000100 << (n)) // buffer n had error
+/*
+ * Buffer n's xfer had an error.
+ * Clear this bit by issuing bp_clear_buf(n)
+ */
+#define BPS_ERROR(n)   (0x00000100 << (n))
 #define BPS_ERROR_0    BPS_ERROR(0)
 #define BPS_ERROR_1    BPS_ERROR(1)
 #define BPS_ERROR_2    BPS_ERROR(2)
@@ -190,7 +198,15 @@
 #define BPS_ERROR_6    BPS_ERROR(6)
 #define BPS_ERROR_7    BPS_ERROR(7)
 
-#define BPS_IDLE(n)     (0x00010000 << (n))  // buffer n is idle
+/*
+ * Buffer n is idle.  A buffer is idle if it's not
+ * DONE, ERROR, or processing a transaction.  If it's
+ * IDLE, it's safe to start a new transaction.
+ *
+ * Clear this bit by starting a xfer with
+ * bp_send_from_buf or bp_receive_to_buf.
+ */
+#define BPS_IDLE(n)     (0x00010000 << (n))
 #define BPS_IDLE_0     BPS_IDLE(0)
 #define BPS_IDLE_1     BPS_IDLE(1)
 #define BPS_IDLE_2     BPS_IDLE(2)
@@ -200,10 +216,28 @@
 #define BPS_IDLE_6     BPS_IDLE(6)
 #define BPS_IDLE_7     BPS_IDLE(7)
 
-#define BPS_DONE_ALL   0x000000ff      // mask of all dones
-#define BPS_ERROR_ALL  0x0000ff00      // mask of all errors
-#define PBS_IDLE_ALL    0x00ff0000     // mask of all idles
+/*
+ * Buffer n has a "slow path" packet in it.
+ * This bit is orthogonal to the bits above and indicates that
+ * the FPGA ethernet rx protocol engine has identified this packet
+ * as one requiring firmware intervention.
+ */
+#define BPS_SLOWPATH(n) (0x01000000 << (n))
+#define BPS_SLOWPATH_0 BPS_SLOWPATH(0)
+#define BPS_SLOWPATH_1 BPS_SLOWPATH(1)
+#define BPS_SLOWPATH_2 BPS_SLOWPATH(2)
+#define BPS_SLOWPATH_3 BPS_SLOWPATH(3)
+#define BPS_SLOWPATH_4 BPS_SLOWPATH(4)
+#define BPS_SLOWPATH_5 BPS_SLOWPATH(5)
+#define BPS_SLOWPATH_6 BPS_SLOWPATH(6)
+#define BPS_SLOWPATH_7 BPS_SLOWPATH(7)
 
+
+#define BPS_DONE_ALL     0x000000ff    // mask of all dones
+#define BPS_ERROR_ALL    0x0000ff00    // mask of all errors
+#define BPS_IDLE_ALL      0x00ff0000   // mask of all idles
+#define BPS_SLOWPATH_ALL  0xff000000   // mask of all slowpaths
+
 // The hw_config register
 
 #define        HWC_SIMULATION          0x80000000
@@ -401,7 +435,7 @@
 
 ///////////////////////////////////////////////////
 // UART, Slave 10
-// include "wb16650.h for registers
+// include "wb16650.h" for registers
 
 #define UART_BASE  0xF000