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[Commit-gnuradio] r6740 - in gnuradio/branches/developers/matt/u2f: firm
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From: |
matt |
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Subject: |
[Commit-gnuradio] r6740 - in gnuradio/branches/developers/matt/u2f: firmware sdr_lib top/u2_basic |
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Date: |
Mon, 29 Oct 2007 11:46:42 -0600 (MDT) |
Author: matt
Date: 2007-10-29 11:46:38 -0600 (Mon, 29 Oct 2007)
New Revision: 6740
Added:
gnuradio/branches/developers/matt/u2f/firmware/ibs_rx_test.c
Modified:
gnuradio/branches/developers/matt/u2f/firmware/Makefile
gnuradio/branches/developers/matt/u2f/firmware/memory_map.h
gnuradio/branches/developers/matt/u2f/firmware/test1_main.c
gnuradio/branches/developers/matt/u2f/sdr_lib/dsp_core_rx.v
gnuradio/branches/developers/matt/u2f/sdr_lib/rx_control.v
gnuradio/branches/developers/matt/u2f/top/u2_basic/u2_basic.v
Log:
first basically functional ibs on RX side
Modified: gnuradio/branches/developers/matt/u2f/firmware/Makefile
===================================================================
--- gnuradio/branches/developers/matt/u2f/firmware/Makefile 2007-10-29
15:58:42 UTC (rev 6739)
+++ gnuradio/branches/developers/matt/u2f/firmware/Makefile 2007-10-29
17:46:38 UTC (rev 6740)
@@ -20,8 +20,8 @@
.PRECIOUS : %.bin
-ROMS = test1.rom eth_test.rom timer_test.rom ibs_tx_test.rom
-DUMPS = test1.dump eth_test.dump timer_test.dump ibs_tx_test.dump
+ROMS = test1.rom eth_test.rom timer_test.rom ibs_tx_test.rom ibs_rx_test.rom
+DUMPS = test1.dump eth_test.dump timer_test.dump ibs_tx_test.dump
ibs_rx_test.dump
LIBS = libu2fw.a
all: $(ROMS) $(DUMPS)
@@ -51,6 +51,9 @@
ibs_tx_test.exe: ibs_tx_test.o libu2fw.a
$(CC) $(LDFLAGS) $^ -o $@
+ibs_rx_test.exe: ibs_rx_test.o libu2fw.a
+ $(CC) $(LDFLAGS) $^ -o $@
+
clean:
rm -f *.a *.o *.bin *.rom *.exe *.dump
@@ -63,5 +66,6 @@
test1_main.o: u2_init.h memory_map.h eth_mac_regs.h spi.h buffer_pool.h
sim_io.h test1_main.c
eth_test.o: u2_init.h memory_map.h eth_mac_regs.h spi.h buffer_pool.h sim_io.h
eth_test.c
ibs_tx_test.o: u2_init.h memory_map.h eth_mac_regs.h spi.h buffer_pool.h
sim_io.h ibs_tx_test.c
+ibs_rx_test.o: u2_init.h memory_map.h eth_mac_regs.h spi.h buffer_pool.h
sim_io.h ibs_rx_test.c
eth.o: u2_init.h memory_map.h eth_mac_regs.h spi.h buffer_pool.h sim_io.h eth.c
eth_mac.o: memory_map.h eth_mac_regs.h eth_mac.c
Added: gnuradio/branches/developers/matt/u2f/firmware/ibs_rx_test.c
===================================================================
--- gnuradio/branches/developers/matt/u2f/firmware/ibs_rx_test.c
(rev 0)
+++ gnuradio/branches/developers/matt/u2f/firmware/ibs_rx_test.c
2007-10-29 17:46:38 UTC (rev 6740)
@@ -0,0 +1,82 @@
+#include "u2_init.h"
+#include "memory_map.h"
+#include "spi.h"
+#include "sim_io.h"
+#include "buffer_pool.h"
+
+#define PORT 2 // ethernet = 2, serdes = 0
+int dsp_rx_buf, dsp_tx_buf, serdes_rx_buf, serdes_tx_buf;
+int dsp_rx_idle, dsp_tx_idle, serdes_rx_idle, serdes_tx_idle;
+
+int buffer_state[4];
+
+static void
+wait_until_status_nonzero(void)
+{
+ while (buffer_pool_status->status == 0)
+ ;
+}
+
+int
+main(void)
+{
+ int i;
+
+ u2_init();
+
+ output_regs->adc_ctrl = 0x0A;
+
+ dsp_rx_regs->freq = 0;
+ dsp_rx_regs->scale_i = 1;
+ dsp_rx_regs->scale_q = 1;
+ dsp_rx_regs->decim_rate = 7;
+
+ volatile unsigned int *buffer0 = buffer_ram(0);
+ volatile unsigned int *buffer1 = buffer_ram(1);
+ volatile unsigned int *buffer2 = buffer_ram(2);
+
+ sim_puts("Starting RX\n");
+ bp_clear_buf(0);
+ bp_receive_to_buf(0, 1, 1, 0, 99);
+
+ dsp_rx_regs->rx_command = (50 << 9) | 100; // Numlines, lines per frame
+ dsp_rx_regs->rx_time = 0x0c00;
+
+ dsp_rx_regs->rx_command = (137 << 9) | 50; // Numlines, lines per frame
+ dsp_rx_regs->rx_time = 0x0e00;
+
+ while (buffer_pool_status->status == 0)
+ ;
+ bp_clear_buf(0);
+ bp_clear_buf(1);
+ bp_receive_to_buf(1, 1, 1, 0, 99);
+ while (buffer_pool_status->status == 0)
+ ;
+ bp_clear_buf(2);
+ bp_receive_to_buf(2, 1, 1, 0, 99);
+ while (buffer_pool_status->status == 0)
+ ;
+
+ for(i=0;i<100;i++) {
+ sim_puthex(i);
+ sim_puts(" ");
+ sim_puthex_nl(buffer0[i]);
+ }
+ for(i=0;i<60;i++) {
+ sim_puthex(i);
+ sim_puts(" ");
+ sim_puthex_nl(buffer1[i]);
+ }
+ for(i=0;i<60;i++) {
+ sim_puthex(i);
+ sim_puts(" ");
+ sim_puthex_nl(buffer2[i]);
+ }
+ //while(timer_regs -> time < 0x6000)
+ // {}
+
+ sim_puts("Done\n");
+ sim_finish();
+
+ return 1;
+}
Modified: gnuradio/branches/developers/matt/u2f/firmware/memory_map.h
===================================================================
--- gnuradio/branches/developers/matt/u2f/firmware/memory_map.h 2007-10-29
15:58:42 UTC (rev 6739)
+++ gnuradio/branches/developers/matt/u2f/firmware/memory_map.h 2007-10-29
17:46:38 UTC (rev 6740)
@@ -251,7 +251,7 @@
volatile short scale_i;
volatile short scale_q;
volatile int interp_rate;
- volatile int run_tx;
+ volatile int clear_state;
} dsp_tx_regs_t;
#define dsp_tx_regs ((dsp_tx_regs_t *) DSP_TX_BASE)
@@ -263,7 +263,8 @@
volatile short scale_i;
volatile short scale_q;
volatile int decim_rate;
- volatile int run_rx;
+ volatile int rx_time;
+ volatile int rx_command;
} dsp_rx_regs_t;
#define dsp_rx_regs ((dsp_rx_regs_t *) DSP_RX_BASE)
Modified: gnuradio/branches/developers/matt/u2f/firmware/test1_main.c
===================================================================
--- gnuradio/branches/developers/matt/u2f/firmware/test1_main.c 2007-10-29
15:58:42 UTC (rev 6739)
+++ gnuradio/branches/developers/matt/u2f/firmware/test1_main.c 2007-10-29
17:46:38 UTC (rev 6740)
@@ -64,7 +64,7 @@
serdes_tx_idle = 1;
bp_receive_to_buf(0, 1, 1, 10, 509); // DSP_RX to buffer 0, use 500 lines
- dsp_rx_regs->run_rx = 1; // Start DSP_RX
+ //dsp_rx_regs->run_rx = 1; // Start DSP_RX
sim_puts("Done DSP RX setup\n");
// Set up serdes RX
@@ -76,7 +76,7 @@
;
sim_puts("Done DSP TX setup\n");
- dsp_tx_regs->run_tx = 1;
+ //dsp_tx_regs->run_tx = 1;
// register interrupt handler
pic_register_handler(IRQ_BUFFER, buffer_irq_handler);
Modified: gnuradio/branches/developers/matt/u2f/sdr_lib/dsp_core_rx.v
===================================================================
--- gnuradio/branches/developers/matt/u2f/sdr_lib/dsp_core_rx.v 2007-10-29
15:58:42 UTC (rev 6739)
+++ gnuradio/branches/developers/matt/u2f/sdr_lib/dsp_core_rx.v 2007-10-29
17:46:38 UTC (rev 6740)
@@ -8,8 +8,8 @@
input [13:0] adc_b, input adc_ovf_b,
output [31:0] sample,
- input run_rx,
- output wr_req
+ input run,
+ output strobe
);
wire [15:0] scale_i, scale_q;
@@ -21,9 +21,6 @@
assign sample = {i_decim[23:8],q_decim[23:8]};
- wire stb_decim;
- assign wr_req = stb_decim;
-
setting_reg #(.my_addr(`DSP_CORE_RX_BASE+0)) sr_0
(.clk(clk),.rst(rst),.strobe(set_stb),.addr(set_addr),
.in(set_data),.out(phase_inc),.changed());
@@ -39,27 +36,27 @@
always @(posedge clk)
if(rst)
phase <= 0;
- else if(run_rx)
+ else if(run)
phase <= phase + phase_inc;
wire [23:0] i_bb, q_bb;
- strobe_gen
strobe_gen(.clock(clk),.reset(rst),.enable(run_rx),.rate(decim_rate),
- .strobe_in(1),.strobe(stb_decim) );
+ strobe_gen
strobe_gen(.clock(clk),.reset(rst),.enable(run),.rate(decim_rate),
+ .strobe_in(1),.strobe(strobe) );
cordic #(.bitwidth(24))
- cordic(.clock(clk), .reset(rst), .enable(run_rx),
+ cordic(.clock(clk), .reset(rst), .enable(run),
.xi({adc_a,10'b0}),. yi({adc_b,10'b0}), .zi(phase[31:16]),
.xo(i_bb),.yo(q_bb),.zo() );
cic_decim #(.bw(24))
- decim_i (.clock(clk),.reset(rst),.enable(run_rx),
- .rate(decim_rate),.strobe_in(1'b1),.strobe_out(stb_decim),
+ decim_i (.clock(clk),.reset(rst),.enable(run),
+ .rate(decim_rate),.strobe_in(1'b1),.strobe_out(strobe),
.signal_in(i_bb),.signal_out(i_decim));
cic_decim #(.bw(24))
- decim_q (.clock(clk),.reset(rst),.enable(run_rx),
- .rate(decim_rate),.strobe_in(1'b1),.strobe_out(stb_decim),
+ decim_q (.clock(clk),.reset(rst),.enable(run),
+ .rate(decim_rate),.strobe_in(1'b1),.strobe_out(strobe),
.signal_in(q_bb),.signal_out(q_decim));
endmodule // dsp_core_rx
Modified: gnuradio/branches/developers/matt/u2f/sdr_lib/rx_control.v
===================================================================
--- gnuradio/branches/developers/matt/u2f/sdr_lib/rx_control.v 2007-10-29
15:58:42 UTC (rev 6739)
+++ gnuradio/branches/developers/matt/u2f/sdr_lib/rx_control.v 2007-10-29
17:46:38 UTC (rev 6740)
@@ -20,32 +20,35 @@
// From DSP Core
input [31:0] sample,
- output run_rx,
- input wr_req
+ output run,
+ input strobe
);
+ wire [31:0] new_time, new_command;
+ wire sc_pre1, store_command;
setting_reg #(.my_addr(`DSP_CORE_RX_BASE+3)) sr_3
(.clk(clk),.rst(rst),.strobe(set_stb),.addr(set_addr),
- .in(set_data),.out(run_rx),.changed());
-
- wire [31:0] new_time, new_command;
- wire store_command;
+ .in(set_data),.out(new_time),.changed(sc_pre1));
+
setting_reg #(.my_addr(`DSP_CORE_RX_BASE+4)) sr_4
(.clk(clk),.rst(rst),.strobe(set_stb),.addr(set_addr),
- .in(set_data),.out(new_time),.changed(store_command));
-
- setting_reg #(.my_addr(`DSP_CORE_RX_BASE+5)) sr_5
- (.clk(clk),.rst(rst),.strobe(set_stb),.addr(set_addr),
.in(set_data),.out(new_command),.changed());
- wire [31:0] rcvtime;
+ reg sc_pre2;
+ always @(posedge clk)
+ sc_pre2 <= sc_pre1;
+ assign store_command = sc_pre1 & ~sc_pre2;
+
+ wire [31:0] rcvtime_pre;
+ reg [31:0] rcvtime;
wire [8:0] lines_per_frame;
wire [22:0] numlines;
-
+ wire full_ctrl, read_ctrl, empty_ctrl;
+
shortfifo #(.WIDTH(64)) commandfifo
(.clk(clk),.rst(rst),
.datain({new_time,new_command}), .write(store_command), .full(full_ctrl),
- .dataout({rcvtime,numlines,lines_per_frame}), .read(read_ctrl),
.empty(empty_ctrl) );
+ .dataout({rcvtime_pre,numlines,lines_per_frame}), .read(read_ctrl),
.empty(empty_ctrl) );
// Buffer interface to internal FIFO
wire write, full, read, empty;
@@ -76,29 +79,82 @@
assign wr_error_o = 0; // FIXME add check here for eop if we have
wr_full_i once we have IBS
assign read = wr_write_o; // FIXME what if there is junk between
packets?
-
+
+ wire [33:0] fifo_line;
// Internal FIFO, size 9 is 2K, size 10 is 4K
longfifo #(.WIDTH(34),.SIZE(FIFOSIZE)) rxfifo
(.clk(clk),.rst(rst),
- .datain({sop_i,eop_i,sample}), .write(write), .full(full),
+ .datain(fifo_line), .write(write), .full(full),
.dataout({sop_o,eop_o,wr_dat_o}), .read(read), .empty(empty)
);
// Internal FIFO to DSP interface
+ reg [22:0] lines_left;
+ reg [8:0] lines_left_frame;
+ localparam IBS_IDLE = 0;
+ localparam IBS_WAITING = 1;
+ localparam IBS_FIRSTLINE = 2;
+ localparam IBS_RUNNING = 3;
+ localparam IBS_OVERRUN = 4;
- // Inband signalling support needs to go in here...
- assign write = wr_req & ~full;
-
- assign overrun = wr_req & full;
-
- reg [8:0] counter;
+ reg [2:0] ibs_state;
+
+ wire [32:0] delta_time = {1'b0,rcvtime}-{1'b0,master_time};
+ wire too_late = (delta_time[32:31] == 2'b11);
+ wire go_now = ( master_time == rcvtime );
+
always @(posedge clk)
if(rst)
- begin
- sop_i <= 1;
- eop_i <= 0;
- counter <= 0;
- end
-
+ ibs_state <= IBS_IDLE;
+ else
+ case(ibs_state)
+ IBS_IDLE :
+ if(~empty_ctrl)
+ begin
+ lines_left <= numlines;
+ lines_left_frame <= lines_per_frame;
+ rcvtime <= rcvtime_pre;
+ ibs_state <= IBS_WAITING;
+ end
+ IBS_WAITING :
+ if(go_now)
+ ibs_state <= IBS_FIRSTLINE;
+ else if(too_late)
+ ibs_state <= IBS_OVERRUN;
+ //else if(ibs_reset)
+ // ibs_state <= IBS_IDLE;
+ IBS_FIRSTLINE :
+ if(full | strobe)
+ ibs_state <= IBS_OVERRUN;
+ else
+ ibs_state <= IBS_RUNNING;
+ IBS_RUNNING :
+ if(strobe)
+ if(full)
+ ibs_state <= IBS_OVERRUN;
+ else
+ begin
+ lines_left <= lines_left - 1;
+ if(lines_left == 1)
+ ibs_state <= IBS_IDLE;
+ else if(lines_left_frame == 1)
+ begin
+ lines_left_frame <= lines_per_frame;
+ ibs_state <= IBS_FIRSTLINE;
+ end
+ else
+ lines_left_frame <= lines_left_frame - 1;
+ end // else: !if(full)
+ IBS_OVERRUN :
+ ;
+ endcase // case(ibs_state)
+
+ assign fifo_line = (ibs_state == IBS_FIRSTLINE) ? {1'b1,1'b0,master_time} :
+ {1'b0,((lines_left==1)|(lines_left_frame==1)),sample};
+
+ assign write = ((ibs_state == IBS_FIRSTLINE) | strobe) & ~full; // &
(ibs_state == IBS_RUNNING) should strobe only when running
+ assign overrun = (ibs_state == IBS_OVERRUN);
+ assign run = (ibs_state == IBS_RUNNING) | (ibs_state == IBS_FIRSTLINE);
+ assign read_ctrl = (ibs_state == IBS_IDLE) & ~empty_ctrl;
+
endmodule // rx_control
-
Modified: gnuradio/branches/developers/matt/u2f/top/u2_basic/u2_basic.v
===================================================================
--- gnuradio/branches/developers/matt/u2f/top/u2_basic/u2_basic.v
2007-10-29 15:58:42 UTC (rev 6739)
+++ gnuradio/branches/developers/matt/u2f/top/u2_basic/u2_basic.v
2007-10-29 17:46:38 UTC (rev 6740)
@@ -436,7 +436,7 @@
wire [31:0] sample_rx, sample_tx;
wire run_rx, run_tx;
- wire wr_req, strobe_tx;
+ wire strobe_rx, strobe_tx;
always @(posedge dsp_clk)
begin
@@ -456,13 +456,13 @@
.master_time(master_time),.overrun(overrun),
.wr_dat_o(wr1_dat), .wr_write_o(wr1_write), .wr_done_o(wr1_done),
.wr_error_o(wr1_error),
.wr_ready_i(wr1_ready), .wr_full_i(wr1_full),
- .sample(sample_rx), .run_rx(run_rx), .wr_req(wr_req) );
+ .sample(sample_rx), .run(run_rx), .strobe(strobe_rx) );
dsp_core_rx dsp_core_rx
(.clk(dsp_clk),.rst(dsp_rst),
.set_stb(set_stb),.set_addr(set_addr),.set_data(set_data),
.adc_a(adc_a),.adc_ovf_a(adc_ovf_a),.adc_b(adc_b),.adc_ovf_b(adc_ovf_b),
- .sample(sample_rx), .run_rx(run_rx), .wr_req(wr_req) );
+ .sample(sample_rx), .run(run_rx), .strobe(strobe_rx) );
tx_control tx_control
(.clk(dsp_clk), .rst(dsp_rst),
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matt <=