[Commit-gnuradio] r6333 - in gnuradio/branches/developers/zhuochen/inband/usrp/fpga: inband_lib toplevel/usrp_inband_usb

[gnychis]

Author: gnychis
Date: 2007-09-05 17:00:21 -0600 (Wed, 05 Sep 2007)
New Revision: 6333

Modified:
   
gnuradio/branches/developers/zhuochen/inband/usrp/fpga/inband_lib/channel_ram.v
   
gnuradio/branches/developers/zhuochen/inband/usrp/fpga/inband_lib/packet_builder.v
   
gnuradio/branches/developers/zhuochen/inband/usrp/fpga/inband_lib/rx_buffer_inband.v
   
gnuradio/branches/developers/zhuochen/inband/usrp/fpga/toplevel/usrp_inband_usb/usrp_inband_usb.v
Log:
Pushing some of the underrun/overrun changes by Leo back in


Modified: 
gnuradio/branches/developers/zhuochen/inband/usrp/fpga/inband_lib/channel_ram.v
===================================================================
--- 
gnuradio/branches/developers/zhuochen/inband/usrp/fpga/inband_lib/channel_ram.v 
    2007-09-05 22:13:18 UTC (rev 6332)
+++ 
gnuradio/branches/developers/zhuochen/inband/usrp/fpga/inband_lib/channel_ram.v 
    2007-09-05 23:00:21 UTC (rev 6333)
@@ -101,8 +101,8 @@
                                
        //packet_waiting is set to zero if rd_done_int is high
        //because there is no guarantee that nb_packets will be pos.
-       assign packet_waiting = (nb_packets != 0) & (~rd_done_int);
-       
+       //assign packet_waiting = (nb_packets != 0) & (~rd_done_int);
+       assign packet_waiting = (nb_packets > 1) | ((nb_packets == 
1)&(~rd_done_int));
        always @(posedge txclk)
                if (reset)
                        nb_packets <= 0;

Modified: 
gnuradio/branches/developers/zhuochen/inband/usrp/fpga/inband_lib/packet_builder.v
===================================================================
--- 
gnuradio/branches/developers/zhuochen/inband/usrp/fpga/inband_lib/packet_builder.v
  2007-09-05 22:13:18 UTC (rev 6332)
+++ 
gnuradio/branches/developers/zhuochen/inband/usrp/fpga/inband_lib/packet_builder.v
  2007-09-05 23:00:21 UTC (rev 6333)
@@ -15,7 +15,8 @@
     output reg [15:0]fifodata,
     input have_space, 
        input wire [31:0]rssi_0, input wire [31:0]rssi_1, input wire 
[31:0]rssi_2,
-       input wire [31:0]rssi_3, output wire [7:0] debugbus);
+       input wire [31:0]rssi_3, output wire [7:0] debugbus,
+       input [NUM_CHAN:0] overrun, input [NUM_CHAN:0] underrun);
     
     
     // States
@@ -93,9 +94,10 @@
                 fifodata[`RSSI] <= #1 true_rssi[5:0];
                 fifodata[`BURST] <= #1 0;
                 fifodata[`DROPPED] <= #1 0;
-                fifodata[`UNDERRUN] <= #1 0;
-                fifodata[`OVERRUN] <= #1 0;
-                
+                fifodata[`UNDERRUN] <= #1 (check_next == 1) ? underrun[0] : 
+                                                                               
        ((check_next == 2) ? underrun[1] : 0);
+                fifodata[`OVERRUN] <= #1 (check_next == 1) ? overrun[0] : 
+                                                                               
        ((check_next == 2) ? overrun[1] : 0);
                 state <= #1 `TIMESTAMP;
             end
             

Modified: 
gnuradio/branches/developers/zhuochen/inband/usrp/fpga/inband_lib/rx_buffer_inband.v
===================================================================
--- 
gnuradio/branches/developers/zhuochen/inband/usrp/fpga/inband_lib/rx_buffer_inband.v
        2007-09-05 22:13:18 UTC (rev 6332)
+++ 
gnuradio/branches/developers/zhuochen/inband/usrp/fpga/inband_lib/rx_buffer_inband.v
        2007-09-05 23:00:21 UTC (rev 6333)
@@ -33,7 +33,8 @@
        output reg rx_WR_enabled,
        //signal strength
        input wire [31:0] rssi_0, input wire [31:0] rssi_1,
-       input wire [31:0] rssi_2, input wire [31:0] rssi_3
+       input wire [31:0] rssi_2, input wire [31:0] rssi_3,
+  input wire [1:0] tx_overrun, input wire [1:0] tx_underrun
     );
     
     parameter NUM_CHAN = 1;
@@ -102,7 +103,8 @@
             .fifodata ( fifodata ),
             .have_space ( have_space ),
                 .rssi_0(rssi_0), .rssi_1(rssi_1),
-               .rssi_2(rssi_2),.rssi_3(rssi_3), .debugbus(debug));
+               .rssi_2(rssi_2),.rssi_3(rssi_3), .debugbus(debug)
+    .overrun(tx_overrun), .underrun(tx_underrun));
         
         // Detect overrun
         always @(posedge rxclk)

Modified: 
gnuradio/branches/developers/zhuochen/inband/usrp/fpga/toplevel/usrp_inband_usb/usrp_inband_usb.v
===================================================================
--- 
gnuradio/branches/developers/zhuochen/inband/usrp/fpga/toplevel/usrp_inband_usb/usrp_inband_usb.v
   2007-09-05 22:13:18 UTC (rev 6332)
+++ 
gnuradio/branches/developers/zhuochen/inband/usrp/fpga/toplevel/usrp_inband_usb/usrp_inband_usb.v
   2007-09-05 23:00:21 UTC (rev 6333)
@@ -74,10 +74,10 @@
    assign usbrdy[0] = have_space;
    assign usbrdy[1] = have_pkt_rdy;
 
-   wire   tx_underrun, rx_overrun;    
+   wire   rx_overrun;    
    wire   clear_status = FX2_1;
    assign FX2_2 = rx_overrun;
-   assign FX2_3 = tx_underrun;
+   assign FX2_3 = (tx_underrun == 0);
       
    wire [15:0] usbdata_out;
    
@@ -135,15 +135,19 @@
 wire [31:0] reg_data_in;
 wire [1:0] reg_io_enable;
 wire [31:0] rssi_threshhold;
+
 register_io register_control
 
(.clk(clk64),.reset(1'b0),.enable(reg_io_enable),.addr(reg_addr),.datain(reg_data_in),
  .dataout(reg_data_out),.rssi_0(rssi_0), .rssi_1(rssi_1), .rssi_2(rssi_2), 
  .rssi_3(rssi_3), .threshhold(rssi_threshhold));
+wire [1:0] tx_overrun;
+wire [1:0] tx_underrun;
 
 `ifdef TX_IN_BAND
        tx_buffer_inband tx_buffer
      ( .usbclk(usbclk),.bus_reset(tx_bus_reset),.reset(tx_dsp_reset),
-       
.usbdata(usbdata),.WR(WR),.have_space(have_space),.tx_underrun(tx_underrun),
+       .usbdata(usbdata),.WR(WR),.have_space(have_space),
+       .tx_underrun(tx_underrun), .tx_overrun(tx_overrun),
        .channels({tx_numchan,1'b0}),
        .tx_i_0(ch0tx),.tx_q_0(ch1tx),
        .tx_i_1(ch2tx),.tx_q_1(ch3tx),
@@ -278,7 +282,8 @@
           .rx_WR_done(rx_WR_done),
           .rx_WR_enabled(rx_WR_enabled),
           .debugbus(rx_debugbus),
-          .rssi_0(rssi_0), .rssi_1(rssi_1), .rssi_2(rssi_2), .rssi_3(rssi_3));
+          .rssi_0(rssi_0), .rssi_1(rssi_1), .rssi_2(rssi_2), .rssi_3(rssi_3),
+          .tx_overrun(tx_overrun), .tx_underrun(tx_underrun));
    `else
    rx_buffer rx_buffer
      ( .usbclk(usbclk),.bus_reset(rx_bus_reset),.reset(rx_dsp_reset),
@@ -371,7 +376,7 @@
        .tx_empty(tx_empty),
        //.debug_0(rx_a_a),.debug_1(ddc0_in_i),
        .debug_0(tx_debugbus),.debug_1(tx_debugbus),
-       
.debug_2({rx_sample_strobe,strobe_decim,serial_strobe,serial_addr}),.debug_3({rx_dsp_reset,tx_dsp_reset,rx_bus_reset,tx_bus_reset,enable_rx,tx_underrun,rx_overrun,decim_rate}),
+       
.debug_2({rx_sample_strobe,strobe_decim,serial_strobe,serial_addr}),.debug_3({rx_dsp_reset,tx_dsp_reset,rx_bus_reset,tx_bus_reset,enable_rx,(tx_underrun
 == 0),rx_overrun,decim_rate}),
        .reg_0(reg_0),.reg_1(reg_1),.reg_2(reg_2),.reg_3(reg_3) );
    
    io_pins io_pins