[Commit-gnuradio] r5779 - gnuradio/branches/developers/matt/u2f/control_lib

[matt]

Author: matt
Date: 2007-06-17 00:49:56 -0600 (Sun, 17 Jun 2007)
New Revision: 5779

Modified:
   gnuradio/branches/developers/matt/u2f/control_lib/serdes_tx.v
Log:
change CRC computation blocks


Modified: gnuradio/branches/developers/matt/u2f/control_lib/serdes_tx.v
===================================================================
--- gnuradio/branches/developers/matt/u2f/control_lib/serdes_tx.v       
2007-06-17 06:48:46 UTC (rev 5778)
+++ gnuradio/branches/developers/matt/u2f/control_lib/serdes_tx.v       
2007-06-17 06:49:56 UTC (rev 5779)
@@ -52,7 +52,7 @@
    localparam RUN2 = 3'd3;
    localparam DONE = 3'd4;
    localparam WAIT = 3'd5;
-   localparam CRC = 3'd6;
+   localparam SENDCRC = 3'd6;
    
    reg [2:0]  state, next_state;
    wire [15:0] crc_out;
@@ -104,9 +104,9 @@
         DONE :
           begin
              {ser_tkmsb,ser_tklsb,ser_t} <= {2'b11,PKT_END,PKT_END};
-             state <= CRC;
+             state <= SENDCRC;
           end
-        CRC :
+        SENDCRC :
           begin
              {ser_tkmsb,ser_tklsb,ser_t} <= {2'b00,crc_out};
              state <= IDLE;
@@ -114,16 +114,22 @@
         default
           state <= IDLE;
        endcase // case(state)
-
+   
    assign fifo_read_o = ((state == RUN2) & ~fifo_empty_i);
    assign fifo_done_o = 1'b1;  // Unused -- we always send everything we're 
given
+   
+   reg [15:0] CRC;
+   wire [15:0] nextCRC;
+   
+   always @(posedge clk)
+     if(rst)
+       CRC <= 16'hFFFF;
+     else if(state == IDLE)
+       CRC <= 16'hFFFF;
+     else if((state==RUN1)||(state==RUN2))
+       CRC <= nextCRC;
 
-   ucrc_par #(.POLYNOMIAL(16'b0001000000100001),.INIT_VALUE(16'hFFFF),
-             .DATA_WIDTH(16),.SYNC_RESET(1))
-     ucrc_par (.clk_i(clk),.rst_i(state == IDLE),
-              .clken_i((state==RUN1)||(state==RUN2)),
-              .data_i( (state==RUN1) ? fifo_data_i[15:0] : fifo_data_i[31:16] 
),
-              .match_o(),.crc_o(crc_out) );
-   
+   CRC16_D16 
crc_blk(((state==RUN1)?fifo_data_i[15:0]:fifo_data_i[31:16]),CRC,nextCRC);
+
 endmodule // serdes_tx