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[Commit-gnuradio] r5265 - in gnuradio/branches/developers/thottelt: inba
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From: |
thottelt |
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Subject: |
[Commit-gnuradio] r5265 - in gnuradio/branches/developers/thottelt: inband/usrp/fpga/inband_lib simulations |
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Date: |
Wed, 9 May 2007 10:15:59 -0600 (MDT) |
Author: thottelt
Date: 2007-05-09 10:15:59 -0600 (Wed, 09 May 2007)
New Revision: 5265
Modified:
gnuradio/branches/developers/thottelt/inband/usrp/fpga/inband_lib/tx_buffer_inband.v
gnuradio/branches/developers/thottelt/inband/usrp/fpga/inband_lib/usb_fifo_reader.v
gnuradio/branches/developers/thottelt/simulations/tx.mpf
gnuradio/branches/developers/thottelt/simulations/tx_buffer_test.v
Log:
Made tx_buffer_inband more generic, everything looks good; it just needs testing
Modified:
gnuradio/branches/developers/thottelt/inband/usrp/fpga/inband_lib/tx_buffer_inband.v
===================================================================
---
gnuradio/branches/developers/thottelt/inband/usrp/fpga/inband_lib/tx_buffer_inband.v
2007-05-09 07:27:17 UTC (rev 5264)
+++
gnuradio/branches/developers/thottelt/inband/usrp/fpga/inband_lib/tx_buffer_inband.v
2007-05-09 16:15:59 UTC (rev 5265)
@@ -6,7 +6,7 @@
);
parameter NUM_CHAN = 2 ;
- /* Debug paramters */
+ /* Debug paramters */
parameter STROBE_RATE_0 = 1 ;
parameter STROBE_RATE_1 = 2 ;
@@ -35,6 +35,9 @@
output wire [15:0] tx_i_3 ;
output wire [15:0] tx_q_3 ;
+ /* To generate channel readers */
+ genvar i ;
+
/* These will eventually be external register */
reg [31:0] time_counter ;
wire [7:0] txstrobe_rate [NUM_CHAN:0] ;
@@ -69,13 +72,23 @@
wire [NUM_CHAN:0] tdpf_have_space ;
wire txstrobe_chan [NUM_CHAN:0] ;
+ /* Outputs to transmit chains */
+ wire [15:0] tx_i [NUM_CHAN-1:0] ;
+ wire [15:0] tx_q [NUM_CHAN-1:0] ;
+
assign have_space = ~tupf_wrfull ;
assign tupf_pkt_waiting = (tupf_usedw >= 128) ;
/* TODO: Figure out how to write this genericly */
assign tx_empty = txempty_chan[0] & txempty_chan[1] ;
assign tx_underrun = underrun_chan[0] | underrun_chan[1] ;
+ assign tx_i_0 = txempty_chan[0] ? 16'b0 : tx_i[0] ;
+ assign tx_q_0 = txempty_chan[0] ? 16'b0 : tx_q[0] ;
+ assign tx_i_1 = txempty_chan[1] ? 16'b0 : tx_i[1] ;
+ assign tx_q_1 = txempty_chan[1] ? 16'b0 : tx_q[1] ;
+
+
/* Debug statement */
assign txstrobe_rate[0] = STROBE_RATE_0 ;
assign txstrobe_rate[1] = STROBE_RATE_1 ;
@@ -98,11 +111,11 @@
.q (tupf_fifodata_out),
.rdreq (tupf_rdreq),
.wrfull (tupf_wrfull),
- .rdempty (),
+ .rdempty (/* VOID */),
.rdusedw (tupf_usedw)
);
- usb_fifo_reader tx_usb_packet_reader
+ usb_fifo_reader #(NUM_CHAN) tx_usb_packet_reader
(
.reset (reset),
.tx_clock (txclk),
@@ -114,92 +127,49 @@
.fifodata (tupf_fifodata_out),
.have_space_chan (tdpf_have_space)
);
-
- data_packet_fifo tx_data_packet_fifo_0
- ( .reset (reset),
- .clock (txclk),
- .ram_data_in (tx_data_bus),
- .write_enable (WR_chan[0]),
- .ram_data_out (tdpf_fifodata[0]),
- .pkt_waiting (tdpf_pkt_waiting[0]),
- .read_enable (tdpf_rdreq[0]),
- .pkt_complete (done_chan[0]),
- .skip_packet (tdpf_skip[0]),
- .have_space (tdpf_have_space[0])
- );
+
+ generate for (i = 0 ; i < NUM_CHAN; i = i + 1)
+ begin : generate_channel_readers
+ data_packet_fifo tx_data_packet_fifo
+ ( .reset (reset),
+ .clock (txclk),
+ .ram_data_in (tx_data_bus),
+ .write_enable (WR_chan[i]),
+ .ram_data_out (tdpf_fifodata[i]),
+ .pkt_waiting (tdpf_pkt_waiting[i]),
+ .read_enable (tdpf_rdreq[i]),
+ .pkt_complete (done_chan[i]),
+ .skip_packet (tdpf_skip[i]),
+ .have_space (tdpf_have_space[i])
+ );
- strobe_gen strobe_gen_0
- ( .clock (txclk),
- .reset (reset),
- .enable (1'b1),
- .rate (txstrobe_rate[0]),
- .strobe_in (txstrobe),
- .strobe (txstrobe_chan[0])
- );
+ strobe_gen strobe_gen_chan
+ ( .clock (txclk),
+ .reset (reset),
+ .enable (1'b1),
+ .rate (txstrobe_rate[i]),
+ .strobe_in (txstrobe),
+ .strobe (txstrobe_chan[i])
+ );
- chan_fifo_reader tx_chan_0_reader
- ( .reset (reset),
- .tx_clock (txclk),
- .tx_strobe (txstrobe),
- .adc_time (time_counter),
- .samples_format (4'b0),
- .tx_q (tx_q_0),
- .tx_i (tx_i_0),
- .underrun (underrun_chan[0]),
- .skip (tdpf_skip[0]),
- .rdreq (tdpf_rdreq[0]),
- .fifodata (tdpf_fifodata[0]),
- .pkt_waiting (tdpf_pkt_waiting[0]),
- .tx_empty (txempty_chan[0])
- );
+ chan_fifo_reader tx_chan_reader
+ ( .reset (reset),
+ .tx_clock (txclk),
+ .tx_strobe (txstrobe),
+ .adc_time (time_counter),
+ .samples_format (4'b0),
+ .tx_q (tx_q[i]),
+ .tx_i (tx_i[i]),
+ .underrun (underrun_chan[i]),
+ .skip (tdpf_skip[i]),
+ .rdreq (tdpf_rdreq[i]),
+ .fifodata (tdpf_fifodata[i]),
+ .pkt_waiting (tdpf_pkt_waiting[i]),
+ .tx_empty (txempty_chan[i])
+ );
+
+ end
+ endgenerate
- /*
- Channel 1 block
- wire [15:0] tdpf_fifodata_1;
- wire tdpf_pkt_waiting_1;
- wire tdpf_rdreq_1;
- wire tdpf_skip_1;
- wire tdpf_have_space_1;
- wire txstrobe_chan_1;
-
- data_packet_fifo tx_data_packet_fifo_1
- ( .reset(reset),
- .clock(txclk),
- .ram_data_in(tx_data_bus),
- .write_enable(WR_chan_1),
- .ram_data_out(tdpf_fifodata_1),
- .pkt_waiting(tdpf_pkt_waiting_1),
- .read_enable(tdpf_rdreq_1),
- .pkt_complete(chan_1_done),
- .skip_packet(tdpf_skip_1),
- .have_space(tdpf_have_space_1)
- );
-
- strobe_gen strobe_gen_1
- ( .clock(txclk),
- .reset(reset),
- .enable(1'b1),
- .rate(txstrobe_rate_1),
- .strobe_in(txstrobe),
- .strobe(txstrobe_chan_1)
- );
-
- chan_fifo_reader tx_chan_1_reader (
- .reset(reset),
- .tx_clock(txclk),
- .tx_strobe(txstrobe),
- //.tx_strobe(txstrobe_chan_1),
- .adc_clock(time_counter),
- .samples_format(4'b0),
- .tx_q(tx_q_1),
- .tx_i(tx_i_1),
- .overrun(OR1),
- .underrun(UR1),
- .skip(tdpf_skip_1),
- .rdreq(tdpf_rdreq_1),
- .fifodata(tdpf_fifodata_1),
- .pkt_waiting(tdpf_pkt_waiting_1)
- );*/
-
endmodule // tx_buffer
Modified:
gnuradio/branches/developers/thottelt/inband/usrp/fpga/inband_lib/usb_fifo_reader.v
===================================================================
---
gnuradio/branches/developers/thottelt/inband/usrp/fpga/inband_lib/usb_fifo_reader.v
2007-05-09 07:27:17 UTC (rev 5264)
+++
gnuradio/branches/developers/thottelt/inband/usrp/fpga/inband_lib/usb_fifo_reader.v
2007-05-09 16:15:59 UTC (rev 5265)
@@ -70,7 +70,7 @@
`READ_HEADER:
begin
/* Read header fields */
- channel <= (fifodata & 32'h1F0000) ;
+ channel <= (fifodata[20:16]) ;
pkt_length <= (fifodata & 32'h1FF) + 8 ;
read_length <= 10'd0 ;
Modified: gnuradio/branches/developers/thottelt/simulations/tx.mpf
===================================================================
--- gnuradio/branches/developers/thottelt/simulations/tx.mpf 2007-05-09
07:27:17 UTC (rev 5264)
+++ gnuradio/branches/developers/thottelt/simulations/tx.mpf 2007-05-09
16:15:59 UTC (rev 5265)
@@ -255,11 +255,11 @@
Project_File_4 = ./fake_fx2.v
Project_File_P_4 = cover_toggle 0 vlog_protect 0 file_type verilog group_id 0
cover_exttoggle 0 cover_cond 0 vlog_nodebug 0 vlog_1995compat 0 folder {Top
Level} last_compile 1178480747 cover_branch 0 vlog_noload 0 vlog_enable0In 0
vlog_disableopt 0 vlog_vopt 0 vlog_hazard 0 vlog_showsource 0 ood 0
vlog_0InOptions {} vlog_options {} compile_to work vlog_upper 0 compile_order
11 dont_compile 0 cover_expr 0 cover_stmt 0
Project_File_5 = ../inband/usrp/fpga/inband_lib/usb_fifo_reader.v
-Project_File_P_5 = cover_toggle 0 vlog_protect 0 file_type verilog group_id 0
cover_exttoggle 0 cover_cond 0 vlog_nodebug 0 vlog_1995compat 0 folder {Top
Level} last_compile 1178647949 cover_branch 0 vlog_noload 0 vlog_enable0In 0
vlog_disableopt 0 vlog_vopt 0 vlog_hazard 0 vlog_showsource 0 ood 0
vlog_0InOptions {} vlog_options {} compile_to work vlog_upper 0 compile_order 8
dont_compile 0 cover_expr 0 cover_stmt 0
+Project_File_P_5 = cover_toggle 0 vlog_protect 0 file_type verilog group_id 0
cover_exttoggle 0 cover_cond 0 vlog_nodebug 0 vlog_1995compat 0 folder {Top
Level} last_compile 1178726590 cover_branch 0 vlog_noload 0 vlog_enable0In 0
vlog_disableopt 0 vlog_vopt 0 vlog_showsource 0 vlog_hazard 0 vlog_0InOptions
{} ood 0 vlog_upper 0 compile_to work vlog_options {} compile_order 8
cover_expr 0 dont_compile 0 cover_stmt 0
Project_File_6 = ../inband/usrp/fpga/inband_lib/chan_fifo_reader.v
Project_File_P_6 = cover_toggle 0 vlog_protect 0 file_type verilog group_id 0
cover_exttoggle 0 cover_cond 0 vlog_nodebug 0 vlog_1995compat 0 folder {Top
Level} last_compile 1178648314 cover_branch 0 vlog_noload 0 vlog_enable0In 0
vlog_disableopt 0 vlog_vopt 0 vlog_hazard 0 vlog_showsource 0 ood 0
vlog_0InOptions {} vlog_options {} compile_to work vlog_upper 0 compile_order 6
dont_compile 0 cover_expr 0 cover_stmt 0
Project_File_7 = ../inband/usrp/fpga/inband_lib/tx_buffer_inband.v
-Project_File_P_7 = cover_toggle 0 vlog_protect 0 file_type verilog group_id 0
cover_exttoggle 0 cover_cond 0 vlog_nodebug 0 vlog_1995compat 0 folder {Top
Level} last_compile 1178634500 cover_branch 0 vlog_noload 0 vlog_enable0In 0
vlog_disableopt 0 vlog_vopt 0 vlog_showsource 0 vlog_hazard 0 vlog_0InOptions
{} ood 0 vlog_upper 0 compile_to work vlog_options {} compile_order 4
cover_expr 0 dont_compile 0 cover_stmt 0
+Project_File_P_7 = cover_toggle 0 vlog_protect 0 file_type verilog group_id 0
cover_exttoggle 0 cover_cond 0 vlog_nodebug 0 vlog_1995compat 0 folder {Top
Level} last_compile 1178727140 cover_branch 0 vlog_noload 0 vlog_enable0In 0
vlog_disableopt 0 vlog_vopt 0 vlog_showsource 0 vlog_hazard 0 vlog_0InOptions
{} ood 0 vlog_upper 0 compile_to work vlog_options {} compile_order 4
cover_expr 0 dont_compile 0 cover_stmt 0
Project_File_8 = ../inband/usrp/fpga/inband_lib/usb_fifo_writer.v
Project_File_P_8 = cover_toggle 0 vlog_protect 0 file_type verilog group_id 0
cover_exttoggle 0 cover_cond 0 vlog_nodebug 0 vlog_1995compat 0 folder {Top
Level} last_compile 1178234886 cover_branch 0 vlog_noload 0 vlog_enable0In 0
vlog_disableopt 0 vlog_vopt 0 vlog_hazard 0 vlog_showsource 0 ood 0
vlog_0InOptions {} vlog_options {} compile_to work vlog_upper 0 compile_order
13 dont_compile 0 cover_expr 0 cover_stmt 0
Project_File_9 = ./chan_fifo_readers_test.v
@@ -271,7 +271,7 @@
Project_File_12 = ../inband/usrp/fpga/inband_lib/data_packet_fifo.v
Project_File_P_12 = cover_toggle 0 vlog_protect 0 file_type verilog group_id 0
cover_exttoggle 0 cover_cond 0 vlog_nodebug 0 vlog_1995compat 0 folder {Top
Level} last_compile 1178644305 cover_branch 0 vlog_noload 0 vlog_enable0In 0
vlog_disableopt 0 vlog_vopt 0 vlog_showsource 0 vlog_hazard 0 vlog_0InOptions
{} ood 0 vlog_upper 0 compile_to work vlog_options {} compile_order 7
cover_expr 0 dont_compile 0 cover_stmt 0
Project_File_13 = ./tx_buffer_test.v
-Project_File_P_13 = cover_toggle 0 vlog_protect 0 file_type verilog group_id 0
cover_exttoggle 0 cover_cond 0 vlog_nodebug 0 vlog_1995compat 0 folder {Top
Level} last_compile 1178647009 cover_branch 0 vlog_noload 0 vlog_enable0In 0
vlog_disableopt 0 vlog_vopt 0 vlog_showsource 0 vlog_hazard 0 vlog_0InOptions
{} ood 0 vlog_upper 0 compile_to work vlog_options {} compile_order 3
cover_expr 0 dont_compile 0 cover_stmt 0
+Project_File_P_13 = cover_toggle 0 vlog_protect 0 file_type verilog group_id 0
cover_exttoggle 0 cover_cond 0 vlog_nodebug 0 vlog_1995compat 0 folder {Top
Level} last_compile 1178725490 cover_branch 0 vlog_noload 0 vlog_enable0In 0
vlog_disableopt 0 vlog_vopt 0 vlog_hazard 0 vlog_showsource 0 ood 0
vlog_0InOptions {} vlog_options {} compile_to work vlog_upper 0 compile_order 3
dont_compile 0 cover_expr 0 cover_stmt 0
Project_File_14 = ../inband/usrp/fpga/inband_lib/usb_packet_fifo.v
Project_File_P_14 = cover_toggle 0 vlog_protect 0 file_type verilog group_id 0
cover_exttoggle 0 cover_cond 0 vlog_nodebug 0 vlog_1995compat 0 folder {Top
Level} last_compile 1178232288 cover_branch 0 vlog_noload 0 vlog_enable0In 0
vlog_disableopt 0 vlog_vopt 0 vlog_showsource 0 vlog_hazard 0 vlog_0InOptions
{} ood 0 vlog_upper 0 compile_to work vlog_options {} compile_order 5
cover_expr 0 dont_compile 0 cover_stmt 0
Project_File_15 = ../inband/usrp/fpga/sdr_lib/strobe_gen.v
@@ -307,6 +307,6 @@
XML_CustomDoubleClick =
LOGFILE_DoubleClick = Edit
LOGFILE_CustomDoubleClick =
-EditorState = {tabbed horizontal 1} {Z:/wc/simulations/tx_buffer_test.v 0 0}
{Z:/wc/simulations/fake_fx2.v 0 0} {Z:/wc/simulations/usb_packet_fifo_test.v 0
1} {Z:/wc/simulations/chan_fifo_readers_test.v 0 0}
{Z:/wc/inband/usrp/fpga/sdr_lib/strobe_gen.v 0 0}
{Z:/wc/inband/usrp/fpga/inband_lib/usb_fifo_reader.v 0 0}
+EditorState = {tabbed horizontal 1} {Z:/wc/simulations/tx_buffer_test.v 0 0}
{Z:/wc/simulations/fake_fx2.v 0 0} {Z:/wc/simulations/usb_packet_fifo_test.v 0
1} {Z:/wc/simulations/chan_fifo_readers_test.v 0 0}
{Z:/wc/inband/usrp/fpga/sdr_lib/strobe_gen.v 0 0}
Project_Major_Version = 6
Project_Minor_Version = 1
Modified: gnuradio/branches/developers/thottelt/simulations/tx_buffer_test.v
===================================================================
--- gnuradio/branches/developers/thottelt/simulations/tx_buffer_test.v
2007-05-09 07:27:17 UTC (rev 5264)
+++ gnuradio/branches/developers/thottelt/simulations/tx_buffer_test.v
2007-05-09 16:15:59 UTC (rev 5265)
@@ -102,13 +102,13 @@
i = 0;
- // Write one full packet (channel 0)
+ // Write one full packet (channel 1)
repeat (256) begin
@(posedge usbclk)
WR = 1'b1 ;
if (i == 0)
// channel
- usbdata = 0;
+ usbdata = 1;
else if (i == 1)
// payload size
usbdata = 504;
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