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[Commit-gnuradio] r4025 - usrp-hw/trunk/sym/generated


From: matt
Subject: [Commit-gnuradio] r4025 - usrp-hw/trunk/sym/generated
Date: Sun, 26 Nov 2006 19:40:41 -0700 (MST)

Author: matt
Date: 2006-11-26 19:40:41 -0700 (Sun, 26 Nov 2006)
New Revision: 4025

Added:
   usrp-hw/trunk/sym/generated/cy7c1356cv25-bz-CTRL.src
   usrp-hw/trunk/sym/generated/cy7c1356cv25-bz-PWR.src
   usrp-hw/trunk/sym/generated/cy7c1356cv25-bz-RAM.src
Modified:
   usrp-hw/trunk/sym/generated/Makefile
Log:
512K by 18 NoBL RAM


Modified: usrp-hw/trunk/sym/generated/Makefile
===================================================================
--- usrp-hw/trunk/sym/generated/Makefile        2006-11-27 02:39:12 UTC (rev 
4024)
+++ usrp-hw/trunk/sym/generated/Makefile        2006-11-27 02:40:41 UTC (rev 
4025)
@@ -154,10 +154,12 @@
        lt3510-A.sym \
        lt3510-B.sym \
        adg3301.sym \
-       ds90cp22.sym
+       ds90cp22.sym \
+       cy7c1356cv25-bz-PWR.sym \
+       cy7c1356cv25-bz-CTRL.sym \
+       cy7c1356cv25-bz-RAM.sym
 
 
-
 all : $(SOURCES)
 
 clean : 

Added: usrp-hw/trunk/sym/generated/cy7c1356cv25-bz-CTRL.src
===================================================================
--- usrp-hw/trunk/sym/generated/cy7c1356cv25-bz-CTRL.src                        
        (rev 0)
+++ usrp-hw/trunk/sym/generated/cy7c1356cv25-bz-CTRL.src        2006-11-27 
02:40:41 UTC (rev 4025)
@@ -0,0 +1,58 @@
+# This is the template file for creating symbols with tragesym
+# every line starting with '#' is a comment line.
+
+[options]
+# rotate_labels rotates the pintext of top and bottom pins
+# wordswap swaps labels if the pin is on the right side an looks like this:
+# "PB1 (CLK)"
+wordswap=yes
+rotate_labels=yes
+sort_labels=no
+generate_pinseq=yes
+sym_width=1400
+pinwidthvertikal=400
+pinwidthhorizontal=400
+
+[geda_attr]
+# name will be printed in the top of the symbol
+# if you have a device with slots, you'll have to use slot= and slotdef=
+# use comment= if there are special information you want to add
+version=20060906
+name=CY7C1356C-BZ-CTRL
+device=CY7C1356C-BZ
+refdes=U?
+footprint=FBGA165
+description=512Kx18 ZBT/NoBL SRAM, 165 pin FBGA package
+documentation=http://www.cypress.com
+author=mettus
+numslots=0
+#slot=1
+#slotdef=1:
+#slotdef=2:
+#slotdef=3:
+#slotdef=4:
+#comment=
+#comment=
+#comment=
+
+[pins]
+# tabseparated list of pin descriptions
+# pinnr is the physical number of the pin
+# seq is the pinseq= attribute, leave it blank if it doesn't matter
+# type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr)
+# style can be (line,dot,clk,dotclk,none). none if only want to add a net
+# posit. can be (l,r,t,b) or empty for nets
+# net specifies the name of the Vcc or GND name
+# label represents the pinlabel. 
+#      negation lines can be added with _Q_ 
+#      if you want to add a "_" or "\" use "\_" and "\\" as escape sequences
+#-----------------------------------------------------
+#pinnr seq     type    style   posit.  net     label   
+#-----------------------------------------------------
+R1             in      line    r               MODE
+H11            in      line    r               ZZ
+
+P5             in      line    l               TDI
+R5             in      line    l               TMS
+P7             out     line    l               TDO
+R7             clk     clk     l               TCK

Added: usrp-hw/trunk/sym/generated/cy7c1356cv25-bz-PWR.src
===================================================================
--- usrp-hw/trunk/sym/generated/cy7c1356cv25-bz-PWR.src                         
(rev 0)
+++ usrp-hw/trunk/sym/generated/cy7c1356cv25-bz-PWR.src 2006-11-27 02:40:41 UTC 
(rev 4025)
@@ -0,0 +1,126 @@
+# This is the template file for creating symbols with tragesym
+# every line starting with '#' is a comment line.
+
+[options]
+# rotate_labels rotates the pintext of top and bottom pins
+# wordswap swaps labels if the pin is on the right side an looks like this:
+# "PB1 (CLK)"
+wordswap=yes
+rotate_labels=yes
+sort_labels=no
+generate_pinseq=yes
+sym_width=1400
+pinwidthvertikal=400
+pinwidthhorizontal=400
+
+[geda_attr]
+# name will be printed in the top of the symbol
+# if you have a device with slots, you'll have to use slot= and slotdef=
+# use comment= if there are special information you want to add
+version=20060906
+name=CY7C1356C-BZ-PWR
+device=CY7C1356C-BZ
+refdes=U?
+footprint=FBGA165
+description=512Kx18 ZBT/NoBL SRAM, 165 pin FBGA package
+documentation=http://www.cypress.com
+author=mettus
+numslots=0
+#slot=1
+#slotdef=1:
+#slotdef=2:
+#slotdef=3:
+#slotdef=4:
+#comment=
+#comment=
+#comment=
+
+[pins]
+# tabseparated list of pin descriptions
+# pinnr is the physical number of the pin
+# seq is the pinseq= attribute, leave it blank if it doesn't matter
+# type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr)
+# style can be (line,dot,clk,dotclk,none). none if only want to add a net
+# posit. can be (l,r,t,b) or empty for nets
+# net specifies the name of the Vcc or GND name
+# label represents the pinlabel. 
+#      negation lines can be added with _Q_ 
+#      if you want to add a "_" or "\" use "\_" and "\\" as escape sequences
+#-----------------------------------------------------
+#pinnr seq     type    style   posit.  net     label   
+#-----------------------------------------------------
+C4             pwr     line    r               GND
+C5             pwr     line    r               GND
+C6             pwr     line    r               GND
+C7             pwr     line    r               GND
+C8             pwr     line    r               GND
+D5             pwr     line    r               GND
+D6             pwr     line    r               GND
+D7             pwr     line    r               GND
+E5             pwr     line    r               GND
+E6             pwr     line    r               GND
+E7             pwr     line    r               GND
+F5             pwr     line    r               GND
+F6             pwr     line    r               GND
+F7             pwr     line    r               GND
+G5             pwr     line    r               GND
+G6             pwr     line    r               GND
+G7             pwr     line    r               GND
+H5             pwr     line    r               GND
+H6             pwr     line    r               GND
+H7             pwr     line    r               GND
+J5             pwr     line    r               GND
+J6             pwr     line    r               GND
+J7             pwr     line    r               GND
+K5             pwr     line    r               GND
+K6             pwr     line    r               GND
+K7             pwr     line    r               GND
+L5             pwr     line    r               GND
+L6             pwr     line    r               GND
+L7             pwr     line    r               GND
+M5             pwr     line    r               GND
+M6             pwr     line    r               GND
+M7             pwr     line    r               GND
+N4             pwr     line    r               GND
+N8             pwr     line    r               GND
+
+C3             pwr     line    l               VDDQ
+D3             pwr     line    l               VDDQ
+E3             pwr     line    l               VDDQ
+F3             pwr     line    l               VDDQ
+G3             pwr     line    l               VDDQ
+J3             pwr     line    l               VDDQ
+K3             pwr     line    l               VDDQ
+L3             pwr     line    l               VDDQ
+M3             pwr     line    l               VDDQ
+N3             pwr     line    l               VDDQ
+C9             pwr     line    l               VDDQ
+D9             pwr     line    l               VDDQ
+E9             pwr     line    l               VDDQ
+F9             pwr     line    l               VDDQ
+G9             pwr     line    l               VDDQ
+J9             pwr     line    l               VDDQ
+K9             pwr     line    l               VDDQ
+L9             pwr     line    l               VDDQ
+M9             pwr     line    l               VDDQ
+N9             pwr     line    l               VDDQ
+
+D4             pwr     line    l               VDD
+E4             pwr     line    l               VDD
+F4             pwr     line    l               VDD
+G4             pwr     line    l               VDD
+H4             pwr     line    l               VDD
+J4             pwr     line    l               VDD
+K4             pwr     line    l               VDD
+L4             pwr     line    l               VDD
+M4             pwr     line    l               VDD
+
+D8             pwr     line    l               VDD
+E8             pwr     line    l               VDD
+F8             pwr     line    l               VDD
+G8             pwr     line    l               VDD
+H8             pwr     line    l               VDD
+J8             pwr     line    l               VDD
+K8             pwr     line    l               VDD
+L8             pwr     line    l               VDD
+M8             pwr     line    l               VDD

Added: usrp-hw/trunk/sym/generated/cy7c1356cv25-bz-RAM.src
===================================================================
--- usrp-hw/trunk/sym/generated/cy7c1356cv25-bz-RAM.src                         
(rev 0)
+++ usrp-hw/trunk/sym/generated/cy7c1356cv25-bz-RAM.src 2006-11-27 02:40:41 UTC 
(rev 4025)
@@ -0,0 +1,101 @@
+# This is the template file for creating symbols with tragesym
+# every line starting with '#' is a comment line.
+
+[options]
+# rotate_labels rotates the pintext of top and bottom pins
+# wordswap swaps labels if the pin is on the right side an looks like this:
+# "PB1 (CLK)"
+wordswap=yes
+rotate_labels=yes
+sort_labels=no
+generate_pinseq=yes
+sym_width=4400
+pinwidthvertikal=400
+pinwidthhorizontal=400
+
+[geda_attr]
+# name will be printed in the top of the symbol
+# if you have a device with slots, you'll have to use slot= and slotdef=
+# use comment= if there are special information you want to add
+version=20060906
+name=CY7C1356C-BZ-RAM
+device=CY7C1356C-BZ
+refdes=U?
+footprint=FBGA165
+description=512Kx18 ZBT/NoBL SRAM, 165 pin FBGA package
+documentation=http://www.cypress.com
+author=mettus
+numslots=0
+#slot=1
+#slotdef=1:
+#slotdef=2:
+#slotdef=3:
+#slotdef=4:
+#comment=
+#comment=
+#comment=
+
+[pins]
+# tabseparated list of pin descriptions
+# pinnr is the physical number of the pin
+# seq is the pinseq= attribute, leave it blank if it doesn't matter
+# type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr)
+# style can be (line,dot,clk,dotclk,none). none if only want to add a net
+# posit. can be (l,r,t,b) or empty for nets
+# net specifies the name of the Vcc or GND name
+# label represents the pinlabel. 
+#      negation lines can be added with _Q_ 
+#      if you want to add a "_" or "\" use "\_" and "\\" as escape sequences
+#-----------------------------------------------------
+#pinnr seq     type    style   posit.  net     label   
+#-----------------------------------------------------
+D11            io      line    l               DQa
+E11            io      line    l               DQa
+F11            io      line    l               DQa
+G11            io      line    l               DQa
+J10            io      line    l               DQa
+K10            io      line    l               DQa
+L10            io      line    l               DQa
+M10            io      line    l               DQa
+C11            io      line    l               DQPa
+
+J1             io      line    l               DQb
+K1             io      line    l               DQb
+L1             io      line    l               DQb
+M1             io      line    l               DQb
+D2             io      line    l               DQb
+E2             io      line    l               DQb
+F2             io      line    l               DQb
+G2             io      line    l               DQb
+N1             io      line    l               DQPb
+
+A2             in      line    r               A
+B2             in      line    r               A
+A9             in      line    r               A
+A10            in      line    r               A
+A11            in      line    r               A
+B10            in      line    r               A
+P3             in      line    r               A
+R3             in      line    r               A
+P4             in      line    r               A
+R4             in      line    r               A
+P8             in      line    r               A
+R8             in      line    r               A
+P9             in      line    r               A
+R9             in      line    r               A
+P10            in      line    r               A
+R10            in      line    r               A
+R11            in      line    r               A
+P6             in      line    r               A1
+R6             in      line    r               A0
+
+A3             in      dot     b               \_CE1\_
+B3             in      line    b               CE2
+A6             in      dot     b               \_CE3\_
+A7             in      dot     b               \_CEN\_
+B6             clk     clk     b               CLK
+B7             in      dot     b               \_WE\_
+B8             in      dot     b               \_OE\_
+A8             in      line    b               ADV/\_LD\_
+B5             in      dot     b               \_BWa\_
+A4             in      dot     b               \_BWb\_





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