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[Commit-gnuradio] gr-usrp/src db_flexrf_mimo.py
|
From: |
Matt Ettus |
|
Subject: |
[Commit-gnuradio] gr-usrp/src db_flexrf_mimo.py |
|
Date: |
Sun, 25 Jun 2006 20:23:29 +0000 |
CVSROOT: /sources/gnuradio
Module name: gr-usrp
Changes by: Matt Ettus <mettus> 06/06/25 20:23:29
Modified files:
src : db_flexrf_mimo.py
Log message:
proper mimo_b for all rfx boards
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/gr-usrp/src/db_flexrf_mimo.py?cvsroot=gnuradio&r1=1.4&r2=1.5
Patches:
Index: db_flexrf_mimo.py
===================================================================
RCS file: /sources/gnuradio/gr-usrp/src/db_flexrf_mimo.py,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -b -r1.4 -r1.5
--- db_flexrf_mimo.py 17 Jun 2006 18:22:35 -0000 1.4
+++ db_flexrf_mimo.py 25 Jun 2006 20:23:29 -0000 1.5
@@ -43,7 +43,6 @@
"""
return 16
-
class db_flexrf_2400_rx_mimo_a(db_flexrf_2400_rx):
def __init__(self, usrp, which):
db_flexrf_2400_rx.__init__(self, usrp, which)
@@ -59,18 +58,41 @@
class db_flexrf_2400_tx_mimo_b(db_flexrf_2400_tx):
def __init__(self, usrp, which):
db_flexrf_2400_tx.__init__(self, usrp, which)
- self.R_DIV = 1
+ self.R_DIV = 16
def _refclk_divisor(self):
"""
Return value to stick in REFCLK_DIVISOR register
"""
- return 16
-
+ return 1
class db_flexrf_2400_rx_mimo_b(db_flexrf_2400_rx):
def __init__(self, usrp, which):
db_flexrf_2400_rx.__init__(self, usrp, which)
+ self.R_DIV = 16
+
+ def _refclk_divisor(self):
+ """
+ Return value to stick in REFCLK_DIVISOR register
+ """
+ return 1
+
+class db_flexrf_1800_tx_mimo_a(db_flexrf_1800_tx):
+ def __init__(self, usrp, which):
+ db_flexrf_1800_tx.__init__(self, usrp, which)
+ self._enable_refclk(True)
+ self.R_DIV = 1
+
+ def _refclk_divisor(self):
+ """
+ Return value to stick in REFCLK_DIVISOR register
+ """
+ return 16
+
+class db_flexrf_1800_rx_mimo_a(db_flexrf_1800_rx):
+ def __init__(self, usrp, which):
+ db_flexrf_1800_rx.__init__(self, usrp, which)
+ self._enable_refclk(True)
self.R_DIV = 1
def _refclk_divisor(self):
@@ -79,22 +101,119 @@
"""
return 16
+class db_flexrf_1800_tx_mimo_b(db_flexrf_1800_tx):
+ def __init__(self, usrp, which):
+ db_flexrf_1800_tx.__init__(self, usrp, which)
+ self.R_DIV = 16
+
+ def _refclk_divisor(self):
+ """
+ Return value to stick in REFCLK_DIVISOR register
+ """
+ return 1
+
+class db_flexrf_1800_rx_mimo_b(db_flexrf_1800_rx):
+ def __init__(self, usrp, which):
+ db_flexrf_1800_rx.__init__(self, usrp, which)
+ self.R_DIV = 16
+
+ def _refclk_divisor(self):
+ """
+ Return value to stick in REFCLK_DIVISOR register
+ """
+ return 1
class db_flexrf_1200_tx_mimo_a(db_flexrf_1200_tx):
def __init__(self, usrp, which):
db_flexrf_1200_tx.__init__(self, usrp, which)
+ self._enable_refclk(True)
+ self.R_DIV = 1
+
+ def _refclk_divisor(self):
+ """
+ Return value to stick in REFCLK_DIVISOR register
+ """
+ return 16
class db_flexrf_1200_rx_mimo_a(db_flexrf_1200_rx):
def __init__(self, usrp, which):
db_flexrf_1200_rx.__init__(self, usrp, which)
+ self._enable_refclk(True)
+ self.R_DIV = 1
+
+ def _refclk_divisor(self):
+ """
+ Return value to stick in REFCLK_DIVISOR register
+ """
+ return 16
+
+class db_flexrf_1200_tx_mimo_b(db_flexrf_1200_tx):
+ def __init__(self, usrp, which):
+ db_flexrf_1200_tx.__init__(self, usrp, which)
+ self.R_DIV = 16
+
+ def _refclk_divisor(self):
+ """
+ Return value to stick in REFCLK_DIVISOR register
+ """
+ return 1
+
+class db_flexrf_1200_rx_mimo_b(db_flexrf_1200_rx):
+ def __init__(self, usrp, which):
+ db_flexrf_1200_rx.__init__(self, usrp, which)
+ self.R_DIV = 16
+
+ def _refclk_divisor(self):
+ """
+ Return value to stick in REFCLK_DIVISOR register
+ """
+ return 1
class db_flexrf_900_tx_mimo_a(db_flexrf_900_tx):
def __init__(self, usrp, which):
db_flexrf_900_tx.__init__(self, usrp, which)
+ self._enable_refclk(True)
+ self.R_DIV = 1
+
+ def _refclk_divisor(self):
+ """
+ Return value to stick in REFCLK_DIVISOR register
+ """
+ return 16
class db_flexrf_900_rx_mimo_a(db_flexrf_900_rx):
def __init__(self, usrp, which):
db_flexrf_900_rx.__init__(self, usrp, which)
+ self._enable_refclk(True)
+ self.R_DIV = 1
+
+ def _refclk_divisor(self):
+ """
+ Return value to stick in REFCLK_DIVISOR register
+ """
+ return 16
+
+class db_flexrf_900_tx_mimo_b(db_flexrf_900_tx):
+ def __init__(self, usrp, which):
+ db_flexrf_900_tx.__init__(self, usrp, which)
+ self.R_DIV = 16
+
+ def _refclk_divisor(self):
+ """
+ Return value to stick in REFCLK_DIVISOR register
+ """
+ return 1
+
+class db_flexrf_900_rx_mimo_b(db_flexrf_900_rx):
+ def __init__(self, usrp, which):
+ db_flexrf_900_rx.__init__(self, usrp, which)
+ self.R_DIV = 16
+
+ def _refclk_divisor(self):
+ """
+ Return value to stick in REFCLK_DIVISOR register
+ """
+ return 1
class db_flexrf_400_tx_mimo_a(db_flexrf_400_tx):
def __init__(self, usrp, which):
@@ -145,6 +264,8 @@
# hook these daughterboard classes into the auto-instantiation framework
db_instantiator.add(usrp_dbid.FLEX_2400_TX_MIMO_A, lambda usrp, which :
(db_flexrf_2400_tx_mimo_a(usrp, which),))
db_instantiator.add(usrp_dbid.FLEX_2400_RX_MIMO_A, lambda usrp, which :
(db_flexrf_2400_rx_mimo_a(usrp, which),))
+db_instantiator.add(usrp_dbid.FLEX_1800_TX_MIMO_A, lambda usrp, which :
(db_flexrf_1800_tx_mimo_a(usrp, which),))
+db_instantiator.add(usrp_dbid.FLEX_1800_RX_MIMO_A, lambda usrp, which :
(db_flexrf_1800_rx_mimo_a(usrp, which),))
db_instantiator.add(usrp_dbid.FLEX_1200_TX_MIMO_A, lambda usrp, which :
(db_flexrf_1200_tx_mimo_a(usrp, which),))
db_instantiator.add(usrp_dbid.FLEX_1200_RX_MIMO_A, lambda usrp, which :
(db_flexrf_1200_rx_mimo_a(usrp, which),))
db_instantiator.add(usrp_dbid.FLEX_900_TX_MIMO_A, lambda usrp, which :
(db_flexrf_900_tx_mimo_a(usrp, which),))
@@ -154,9 +275,12 @@
db_instantiator.add(usrp_dbid.FLEX_2400_TX_MIMO_B, lambda usrp, which :
(db_flexrf_2400_tx_mimo_b(usrp, which),))
db_instantiator.add(usrp_dbid.FLEX_2400_RX_MIMO_B, lambda usrp, which :
(db_flexrf_2400_rx_mimo_b(usrp, which),))
-db_instantiator.add(usrp_dbid.FLEX_1200_TX_MIMO_B, lambda usrp, which :
(db_flexrf_1200_tx(usrp, which),))
-db_instantiator.add(usrp_dbid.FLEX_1200_RX_MIMO_B, lambda usrp, which :
(db_flexrf_1200_rx(usrp, which),))
-db_instantiator.add(usrp_dbid.FLEX_900_TX_MIMO_B, lambda usrp, which :
(db_flexrf_900_tx(usrp, which),))
-db_instantiator.add(usrp_dbid.FLEX_900_RX_MIMO_B, lambda usrp, which :
(db_flexrf_900_rx(usrp, which),))
+db_instantiator.add(usrp_dbid.FLEX_1800_TX_MIMO_B, lambda usrp, which :
(db_flexrf_1800_tx_mimo_b(usrp, which),))
+db_instantiator.add(usrp_dbid.FLEX_1800_RX_MIMO_B, lambda usrp, which :
(db_flexrf_1800_rx_mimo_b(usrp, which),))
+db_instantiator.add(usrp_dbid.FLEX_1200_TX_MIMO_B, lambda usrp, which :
(db_flexrf_1200_tx_mimo_b(usrp, which),))
+db_instantiator.add(usrp_dbid.FLEX_1200_RX_MIMO_B, lambda usrp, which :
(db_flexrf_1200_rx_mimo_b(usrp, which),))
+db_instantiator.add(usrp_dbid.FLEX_900_TX_MIMO_B, lambda usrp, which :
(db_flexrf_900_tx_mimo_b(usrp, which),))
+db_instantiator.add(usrp_dbid.FLEX_900_RX_MIMO_B, lambda usrp, which :
(db_flexrf_900_rx_mimo_b(usrp, which),))
db_instantiator.add(usrp_dbid.FLEX_400_TX_MIMO_B, lambda usrp, which :
(db_flexrf_400_tx_mimo_b(usrp, which),))
db_instantiator.add(usrp_dbid.FLEX_400_RX_MIMO_B, lambda usrp, which :
(db_flexrf_400_rx_mimo_b(usrp, which),))
+