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make-3.79.1: embedded command prefix problems
From: |
Philip Guenther |
Subject: |
make-3.79.1: embedded command prefix problems |
Date: |
Thu, 15 Nov 2001 23:32:51 -0800 |
The make info pages include the following quote under
Commands->Sequences:
-------
In command execution, each line of a canned sequence is treated just
as if the line appeared on its own in the rule, preceded by a tab. In
particular, `make' invokes a separate subshell for each line. You can
use the special prefix characters that affect command lines (`@', `-',
and `+') on each line of a canned sequence. *Note Writing the Commands
in Rules: Commands. For example, using this canned sequence:
define frobnicate
@echo "frobnicating target $@"
frob-step-1 $< -o address@hidden
frob-step-2 address@hidden -o $@
endef
-------
Okay, combining that with some good advice about automaticly generating
dependencies led to my writing the following variable definitions and
rules:
DEPEND_MUNGE = dfile=$(basename $@).d Pfile=$(basename $@).P ; \
rm -f $$Pfile ; \
sed -e '1s:^:$(dir $@):' < $$dfile >$$Pfile ; \
sed -e 's/\#.*//' -e 's/^[^:]*: *//' -e 's/ *\\$$//' \
-e '/^$$/d' -e 's/$$/ :/' < $$dfile >>$$Pfile ; \
rm -f $$dfile
define COMPILEc
${CC} -c ${ALL_CPPFLAGS} ${LOCAL_CPPFLAGS} ${DEPEND} \
${ALL_CFLAGS} ${LOCAL_CFLAGS} -o $@ $<
@ ${DEPEND_MUNGE}
endef
That's then used in a series of pattern rules that look like:
${objdir}/%.o: ${srcdir}/%.c ; ${COMPILEc}
The problem is that sometimes, but not always, make will execute the
commands in ${COMPILEc} without echoing _any_ of them. "make -n" shows
the correct output and tracing make shows that it really is executing
the commands. Removing the '@' on the ${DEPEND_MUNGE} command makes
everything be echoed properly, so it is as if make sometimes 'leaks' an
embedded '@' prefix to apply to the entire variable.
What I find particularly bizarre is how it doesn't always do it. Make
may need to build six files, all using the same pattern rule, but it'll
only show the ${CC} executing for one of the six. Same directory, same
rule, same variable, different results.
For now I'm using the obvious workaround of changing COMPILEc to read:
define COMPILEc
@ echo ${CC} -c ${ALL_CPPFLAGS} ${LOCAL_CPPFLAGS} ${DEPEND} \
${ALL_CFLAGS} ${LOCAL_CFLAGS} -o $@ $<
@ ${CC} -c ${ALL_CPPFLAGS} ${LOCAL_CPPFLAGS} ${DEPEND} \
${ALL_CFLAGS} ${LOCAL_CFLAGS} -o $@ $<
@ ${DEPEND_MUNGE}
endef
which works just fine.
As a side note, writing DEPEND_MUNGE as a multiline variable definition
using define---endif doesn't appears to work for some other strange
reason. At one point I was seeing two levels of make variable expansion
take place on it. Trying it again now, I get "Recursive variable
`DEPEND_MUNGE' references itself (eventually)" errors, but I need to
play with it more to make sure I'm not confusing myself too.
Philip Guenther
- make-3.79.1: embedded command prefix problems,
Philip Guenther <=