Variable passing at cmd-line vs in MAKEFLAGS

[ketil . johnsen]

Hi...

I belive I have found a bug in GNU make. The problem relates to passing
variables at command line to child make processes. This simple Makefile
demonstrates the problem:

<Makefile>
SRC=/src

all:
        @echo SRC is $(SRC)
        @echo MAKEFLAGS is $(MAKEFLAGS)
        @make SRC=/new/src win32

win32:
        @echo SRC is $(SRC)
        @echo MAKEFLAGS is $(MAKEFLAGS)
</Makefile>

My problem only happens when I use the -e option and specify a
SRC=/something
the first time I call make;

ex: make -e SRC=/mysrc

As you can see from the Makefile, I try to give the second pass a new value
to
the SRC variable. This does not happen, as gnu-make looks at the MAKEFLAGS
variable first, finds it there, and totally ignores my attempt to manually
specify the SRC value.

Command line variables should have higher priority than this MAKEFLAGS
variable.
This is how the unix-versions of make we otherwise use do it.

I did manage to find a "hack" which is really ugly.... if I set MAKEFLAGS=e
befor I execute make, then the SRC-values will never be stored here. This do
totally ruin the use of MAKEFLAGS, so it is not a good solution.

Some system information:
GNU Make version 3.79.1, by Richard Stallman and Roland McGrath.
Built for Windows32.
The config.h has no relevant changes (I belive there is no changes from the
original config.w32 at all)
My OS is Windows 2000 with SP2.

Btw: thanx for great free software

---
Ketil Johnsen, Software Developer
THALES COMMUNICATIONS AS
Prof. Brochs gt. 6,  NO-7030 Trondheim,  Norway