Counter-intuitive behaviour when using recursive variables as pre requisites

[Rammelt Andreas]

Hi!

Today I had a hard time discovering an error in a Makefile I wrote: it seems
like recursive variables are not expanded recursively when used as a
prerequisite. Checking with another make program this seems to be correct
behaviour, but I would like to see that at a prominent place in the infodoc,
where I didn't find it.

E.g.:

The following Makefile 

======8<-------------------------------------
# Test Makefile to show particular counter-intuitive 
# behaviour with recursive variables

all: target1 target2

target1: $(VARIABLE)
        @echo "$@: In this case the prerequisites are empty..."
        @echo "  $^"
        @echo "  $(VARIABLE)"

VARIABLE = now defined

target2: $(VARIABLE)
        @echo "$@: ...and in this case not."
        @echo "  $^"
        @echo "  $(VARIABLE)"

.PHONY: $(VARIABLE)
======8<-------------------------------------

results in the following output:

======8<-------------------------------------
target1: In this case the prerequisites are empty...
  
  now defined
target2: ...and in this case not.
  now defined
  now defined
======8<-------------------------------------

In both cases the "echo $(VARIBALE)" lines give the same result, but the
"echo $^" lines differ. 

Here's the output of "make -version":

======8<-------------------------------------
GNU Make version 3.79.1, by Richard Stallman and Roland McGrath.
Built for i686-pc-linux-gnu
Copyright (C) 1988, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 2000
        Free Software Foundation, Inc.
This is free software; see the source for copying conditions.
There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A
PARTICULAR PURPOSE.
 
Report bugs to <address@hidden>.
======8<-------------------------------------


I'm still hoping this is a real bug and not just a documentation flaw...


Thank you for your time,
Rammi