|Subject:||Fwd: Comments about SMP|
|Date:||Tue, 2 Apr 2019 14:42:32 +0200|
>> It appears mach_ncpus is hardcoded at compile time, maybe you just need
> to detect this value via ACPI (?)
Yes, this is the idea. I set mach_ncpus to maximum value to avoid broken the cpu structure arrays.
But It's not the only that I need to enable cpus. I also need to find their APIC structures (Local APIC and IOAPIC), to send IPI and communicate the cpus.
El Lunes 11 de marzo de 2019, Damien Zammit escribió:
> Hi Almudena,
> > El dom., 10 mar. 2019 a las 18:35, Samuel Thibault
> > (<address@hidden <mailto:address@hidden>>) escribió:
> > Adam Van Ymeren, le dim. 10 mars 2019 13:08:23 -0400, a ecrit:
> > > I don't think that's necessary. The process doesn't have to
> > initiated from gnumach. Hurd could have an SMP server that is
> > started at boot, parses acpi tables and calls in to Mach to
> > initialize the additional cores and start scheduling on them.
> > That's the idea.
> I'm not sure if it is required to send IPI etc, doesn't the BIOS set up
> the extra cores? I've seen code in coreboot that sets up the extra
> cores. I thought you only need the ACPI tables to know how many cores
> to use and pass this value somehow to Mach (?)
> It appears mach_ncpus is hardcoded at compile time, maybe you just need
> to detect this value via ACPI (?) Maybe someone else can comment on how
> "broken" is multiprocessor support as specified in that inline comment.
Enviado desde mi Sailfish OS
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