Re: help me

[Chuck Swiger]

address@hidden wrote:
> hello,
> I'm trying to to create a makefile of this following small program.
[ ... ]
> makefile
> OBJS = prg1.o
> CC = gcc
> CFLAGS = -wall -g
> all : $(OBJS) $(CC) $(OBJS) -o prg.exe
> prg1.o : prg1.c $(CC) $(FLAGS) -c prg1.c -o prg1.o
> main.o : main.c $(CC) $(CFLAGS) -c main.c -o main.o
> clean: rm -f core *.o
>
>
> When I do the make, I get following error :
> make: *** No rule to make target `gcc', needed by `prg1.o'.  Stop.

You're not using the right syntax for Makefiles.
Something like this should do better:

CC= gcc
CFLAGS= -Wall -g
OBJS= prg1.o

all: prg.exe

prg.exe: $(OBJS)
        $(CC) $(CFLAGS) -o prg.exe $(OBJS)

clean:
        rm -f core *.o prg.exe

--
-Chuck