[Virus checked] Problem with DRC after transistor outline edit

[slafferty]

Hi,

I want to use the outline edit feature to draw a serpentine mosfet (W>>L).
However, after doing an outline edit, even a straight (n-channel) mosfet
shows a spurious DRC error. Serpentine devices cause a Java exception when
attempting DRC. Can anyone offer advice on this problem? Details below.

A symptom: Odd behavior beginning outline edit. Selected device does not
show outline nodes. Right-clicking in the device appears to expand
dimensions. However there is only one outline node visible. Another
rightclick gives another outline node and the mosfet width can be edited.

The problem: Out of outline edit mode, Ctrl-I shows Width=6, Length=2 (in
this example). Pressing F5 shows one DRC error: Layout DRC (full) error 1 of
1: Minimum size error on Y axis: cell 'test{lay}' node
N-Transistor['address@hidden'] LESS THAN 2 IN SIZE (IS -20) [rule '2.1, 3.1']

...So it is seeing the Length (Width?) as -20. Details:

Operating Sys: Win XP SP2
Electric ver: 8.07
Electric max memory setting: 512MB
Technology: mocmos
Scale: 800nm
Devices present: One nmos fet.


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