[Bug binutils/25445] movsxd without REX_W prefix incorrectly disassembled

[cvs-commit at gcc dot gnu.org]

https://sourceware.org/bugzilla/show_bug.cgi?id=25445

--- Comment #8 from cvs-commit at gcc dot gnu.org <cvs-commit at gcc dot 
gnu.org> ---
The master branch has been updated by H.J. Lu <address@hidden>:

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=bc31405ebb2c4297ae815ab59f59165014347528

commit bc31405ebb2c4297ae815ab59f59165014347528
Author: H.J. Lu <address@hidden>
Date:   Mon Jan 27 04:38:10 2020 -0800

    x86-64: Properly encode and decode movsxd

    movsxd is a 64-bit only instruction.  It supports both 16-bit and 32-bit
    destination registers.  Its AT&T mnemonic is movslq which only supports
    64-bit destination register.  There is also a discrepancy between AMD64
    and Intel64 on movsxd with 16-bit destination register.  AMD64 supports
    32-bit source operand and Intel64 supports 16-bit source operand.

    This patch updates movsxd encoding and decoding to alow 16-bit and 32-bit
    destination registers.  It also handles movsxd with 16-bit destination
    register for AMD64 and Intel 64.

    gas/

        PR binutils/25445
        * config/tc-i386.c (check_long_reg): Also convert to QWORD for
        movsxd.
        * doc/c-i386.texi: Add a node for AMD64 vs. Intel64 ISA
        differences.  Document movslq and movsxd.
        * testsuite/gas/i386/i386.exp: Run PR binutils/25445 tests.
        * testsuite/gas/i386/x86-64-movsxd-intel.d: New file.
        * testsuite/gas/i386/x86-64-movsxd-intel64-intel.d: Likewise.
        * testsuite/gas/i386/x86-64-movsxd-intel64-inval.l: Likewise.
        * testsuite/gas/i386/x86-64-movsxd-intel64-inval.s: Likewise.
        * testsuite/gas/i386/x86-64-movsxd-intel64.d: Likewise.
        * testsuite/gas/i386/x86-64-movsxd-intel64.s: Likewise.
        * testsuite/gas/i386/x86-64-movsxd-inval.l: Likewise.
        * testsuite/gas/i386/x86-64-movsxd-inval.s: Likewise.
        * testsuite/gas/i386/x86-64-movsxd.d: Likewise.
        * testsuite/gas/i386/x86-64-movsxd.s: Likewise.

    opcodes/

        PR binutils/25445
        * i386-dis.c (MOVSXD_Fixup): New function.
        (movsxd_mode): New enum.
        (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
        (intel_operand_size): Handle movsxd_mode.
        (OP_E_register): Likewise.
        (OP_G): Likewise.
        * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
        register on movsxd.  Add movsxd with 16-bit destination register
        for AMD64 and Intel64 ISAs.
        * i386-tbl.h: Regenerated.

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