Re: [avr-libc-dev] XMega Watchdog clock domains not synchronized?

[Joerg Wunsch]

As Bob Paddock wrote:

> It is internal to the device, true.  Simply must wait for the slower
> clock domain to catch up by stopping the faster domain, so that it is
> no longer pending.

But the question is: *when* (i.e., under which circumstances) do you
have to wait?  Obviously, if you simply want to proceed in your normal
code flow without touching the watchdog immediately again, there's no
point in waiting until the watchdog has synchronized; it'll only
artificially make your code slower.  It's like with an UART, you
aren't going to wait after sending a byte to the shift register unless
you want to touch the UART immediately again (e.g. in order to output
another byte).

I *guess* the suggested implementation (wait after touching WDT.CTRL
and before issuing a WDR instruction) is the correct thing to do, but
I still wish this were authoritatively stated somewhere.  Preferrably
in the datasheet (because it is *the* authoritative document about the
device), but at the very least in the appnote explaining the Xmega
watchdog.  However, both these documents fail to mention anything in
that respect.  So we have to keep guessing ...
-- 
cheers, Joerg               .-.-.   --... ...--   -.. .  DL8DTL

http://www.sax.de/~joerg/
Never trust an operating system you don't have sources for. ;-)