Re: [avr-libc-dev] [bug #12739] Gcc assumes that target libc provides ffs function

[Björn Haase]

Am Donnerstag, 21. April 2005 22:34 schrieb Joerg Wunsch:
> As Dmitry K. wrote:
> > > This makes 6 clocks per cycle, so up to ~ 100 clocks max.
> >
> > Misprint: 7 clocks per cycle (rjmp).
>
> OK, I've confused that with the number of code words.
>
> > > I'm interested in seeing Dmitry's code...
> >
> > I have use byte-width shift:
> >
> >    #define val_lo  r24
> >    #define val_hi  r25
> >    #define cntr    r30
> >         ...
> >    ffs:
> >         ldi     cntr, 1
> >         tst     val_lo
> >         brne    2f
> >         or      val_lo, val_hi
> >         breq    9f
> >         ldi     cntr, 8
> >    1:   inc     cntr
> >    2:   ror     val_lo
> >         brcc    1b
> >         mov     r24, cntr
> >         clr     r25
> >    9:   ret
>
> Oh, I see.
>
> The only thing I'm not too keen on is to have more assembler files in
> the tree.  But the code is for sure excellent. ;-)

Possibly, one could consider to implement calls to this function by one of the 
built-in instruction patterns of gcc. This would be about no work (IIUC) on 
the gcc side. The benefit then would be, that gcc would know in advance that 
the function does only work on r24,r25 and r30 (Possibly one might even make 
use of __tmp_reg__ for the counter) and does not change any other register.
I could do that, once the ffs are included in avr-libc.
This might help then, to implement FP numerics using plain C files. 

Yours,

Björn