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Re: [avr-libc-dev] [task #3693] Add new devices: mega 640-1280-1281-2560

From: Marek Michalkiewicz
Subject: Re: [avr-libc-dev] [task #3693] Add new devices: mega 640-1280-1281-2560-2561
Date: Tue, 15 Mar 2005 14:42:53 +0100
User-agent: Mutt/1.5.6+20040907i

On Tue, Mar 15, 2005 at 02:19:20PM +0100, Bertolt Mildner wrote:

> Yes, the datasheet can lead to this conclusion, but it would not make
> much sense.

It might make sense if 640/128x were actually the same chip, with
defective part of the flash disabled.

> If the IAR Tools are right then only the 256x uses 3-byte addresses on the
> stack.

IAR might not be affected because I think they have two separate stacks
(return stack addressed by SP, and data stack addressed by Y pointer),
so the size of return address doesn't matter for offsets (Y+d) of
function arguments on stack.

> IMHO, the current datasheet does a very very bad job on pointing out
> all the (small but mostly vital) differences between 640/128x and
> 256x!

They do mention that 640 has no RAMPZ, and 640/128x have no EIND though.

> Another example is in the "Instruction Set Summary". It says that CALL
> takes 5 clocks, but i would be very surprised if this holds true for
> 640/128x (64 and 128 take 4 clocks per CALL).

This is directly related to the size of return address on stack (one
more byte = one more memory access = one more clock cycle).

I guess the only way to be reasonably sure is to ask Atmel...


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