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Re: AW: [avr-libc-dev] Improved optimizer for mixed 32 / 16 / 8 bit expr


From: Paul Schlie
Subject: Re: AW: [avr-libc-dev] Improved optimizer for mixed 32 / 16 / 8 bit expressions
Date: Tue, 07 Dec 2004 19:32:58 -0500
User-agent: Microsoft-Entourage/11.1.0.040913

Hi Björn,

Nice pragmatic approach, and likely more acceptable for nearer term
integration into 4.0 than any which may depend on core compiler refinements.

Are your rtl descriptions also capable of optimizing expressions like:
 
 (char/QI)x = (signed char/QI)y + (unsigned char/QI) ;

Such that although GCC want's to promote the + operation to be an int
as it's operands aren't of the same sign, they need not be as the target
of the operation is not wider than it's largest un-promoted operand?

And would be pleased to assist with any asm support function recoding
as may be required conform to a refined ABI as necessary to enable a
transition to a more efficient register allocation scheme. (seconding
Eric's views.)

How would you like to proceed with the experiment? (i.e. developmental .md
file repository html/ftp link? Version of pre-release 4.0 required? etc.?)

Thanks, -paul-

PS - Than with a little luck if we can figure out how to get GCC to allocate
constant data which can't be efficiently in-lined into flash program memory,
along with possibly a scheme to enable the allocation of a handful of global
register as may be required by fast interrupt routines to work in a friendly
way with a refined register allocation scheme;  that would be very nice.


regarding:

> From: Björn Haase <address@hidden>
> 
>> Paul Schlie wrote
>> 
>> Very nice, out of curiosity, whas this done entirely with .md rtl
>> optimization, or improving the minimal type size representation
>> within the compiler's front/middle end? (or a little of both?)
> 
> sorry for replying a bit late. The changes that I have implemented so-far
> are restricted to the machine definition.
> 
> What I have been doing is something rather tedious. I have made use of a
> well-known principle. The people that wrote the avr-port already have made
> use of it.
> ...

and:

> From: Björn Haase <address@hidden>
>
> I have been adding some specialized instruction patterns
> for dealing with expresions that mix QI,HI and SI objects. (Tedious work.)
> 
> In addition to a bunch of specialized "combined" patterns, I would like to
> suggest to change the "copy_to_mode_reg" within the movsi and movhi
> "define_expand"s.
> We could copy const_int values that could fit into 8 or 16 bit in QI or HI
> registers instead and use the appropriate extension operations for promoting
> the values to the HI/SI target modes on the fly.
> 
> In my opinion the main possible benefit of the suggested changes in the
> machine description is that less registers are required.






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