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Re: [avr-libc-dev] [patch] RFC: wdt.h


From: E. Weddington
Subject: Re: [avr-libc-dev] [patch] RFC: wdt.h
Date: Thu, 04 Nov 2004 10:01:51 -0700
User-agent: Mozilla Thunderbird 0.7.3 (Windows/20040803)

E. Weddington wrote:

Hello!

Attached is a patch for include/avr/wdt.h that I think will fix bugs #10811 and #10872, which is getting wdt to work with tiny2313, mega48, mega88, and mega168.

The changes include:
1. These devices use a different watchdog control register name.
2. These devices use another prescaler bit (WDP3), allowing more timeout values.
3. New timeout values as referenced above.
4. The new prescaler bit is non-contiguous with other prescaler bits (WDP2-WDP0). This is accounted for. 5. Removing of magic values in inline assembly which referenced specific bits in registers.
6. Use of stdint.h to make it -mint8 compatible.
7. In wdt_enable, move the fixed bit mask of WDE that was or'd with the value to the _wdt_write macros to better handle with the non-contiguous prescaler bits. 8. As a consequenc of the new handling of the non-contiguous bits, now non-used bits of the *value* parameter (in _wdt_write) are ignored.
9. Doxygen comments for the new stuff.
10. Untabified stuff so I don't have to worry about the 80 character limit for those of you who have tab=8. :-)

So far tests look pretty good, but I just want to make sure I haven't missed anything before I commit.

Comments?


Attached is an update to the patch to wdt.h that includes the fix for the new bug, #10905, regarding wdt on at90can128.

Eric
Index: include/avr/iomx8.h
===================================================================
RCS file: /cvsroot/avr-libc/avr-libc/include/avr/iomx8.h,v
retrieving revision 1.5
diff -u -r1.5 iomx8.h
--- include/avr/iomx8.h 2 Nov 2004 18:16:07 -0000       1.5
+++ include/avr/iomx8.h 3 Nov 2004 22:46:27 -0000
@@ -317,7 +317,7 @@
 #define WDIE    6
 #define WDP3    5
 #define WDCE    4
-#define WDEE    3
+#define WDE     3
 #define WDP2    2
 #define WDP1    1
 #define WDP0    0
Index: include/avr/wdt.h
===================================================================
RCS file: /cvsroot/avr-libc/avr-libc/include/avr/wdt.h,v
retrieving revision 1.8
diff -u -r1.8 wdt.h
--- include/avr/wdt.h   2 Nov 2004 18:16:07 -0000       1.8
+++ include/avr/wdt.h   4 Nov 2004 17:02:34 -0000
@@ -30,6 +30,10 @@
 
 /* $Id: wdt.h,v 1.8 2004/11/02 18:16:07 arcanum Exp $ */
 
+/* 
+Contributers: Eric B. Weddington
+*/
+
 /*
    avr/wdt.h - macros for AVR watchdog timer
  */
@@ -38,6 +42,7 @@
 #define _AVR_WDT_H_
 
 #include <avr/io.h>
+#include <stdint.h>
 
 /** \defgroup avr_watchdog Watchdog timer handling
     \code #include <avr/wdt.h> \endcode
@@ -63,47 +68,67 @@
 
 #define wdt_reset() __asm__ __volatile__ ("wdr")
 
-#if defined (__AVR_ATmega169__)
-#define _wdt_write(value)                              \
-       __asm__ __volatile__ (                          \
-               "in __tmp_reg__,__SREG__" "\n\t"        \
-               "cli" "\n\t"                            \
-               "wdr" "\n\t"                            \
-               "sts %0,%1" "\n\t"                      \
-               "out __SREG__,__tmp_reg__" "\n\t"       \
-               "sts %0,%2"                             \
-               : /* no outputs */                      \
-               : "M" (_SFR_MEM_ADDR(WDTCR)),           \
-                 "r" (0x18),/* _BV(WDCE) | _BV(WDE) */ \
-                 "r" ((unsigned char)(value))          \
-               : "r0"                                  \
-       )
+#if defined(__AVR_ATtiny2313__) || defined(__AVR_ATmega48__) \
+|| defined(__AVR_ATmega88__) || defined(__AVR_ATmega168__)
+#define _WD_CONTROL_REG     WDTCSR
+#define _WD_PS3_MASK        _BV(WDP3)
+#else
+#define _WD_CONTROL_REG     WDTCR
+#define _WD_PS3_MASK        0x00
+#endif
+
+
+#if defined (__AVR_ATmega169__) || defined(__AVR_AT90CAN128__) \
+|| defined(__AVR_ATmega48__) || defined(__AVR_ATmega88__) \
+|| defined(__AVR_ATmega168__)
+ 
+#define _wdt_write(value)   \
+    __asm__ __volatile__ (  \
+        "in __tmp_reg__,__SREG__" "\n\t"    \
+        "cli" "\n\t"    \
+        "wdr" "\n\t"    \
+        "sts %0,%1" "\n\t"  \
+        "out __SREG__,__tmp_reg__" "\n\t"   \
+        "sts %0,%2" \
+        : /* no outputs */  \
+        : "M" (_SFR_MEM_ADDR(_WD_CONTROL_REG)), \
+        "r" (_BV(WDCE) | _BV(WDE)), \
+        "r" ((uint8_t) ((value & 0x08 ? _WD_PS3_MASK : 0x00) | \
+            _BV(WDE) | (value & 0x07)) ) \
+        : "r0"  \
+    )
+    
 #else
-#define _wdt_write(value)                              \
-       __asm__ __volatile__ (                          \
-               "in __tmp_reg__,__SREG__" "\n\t"        \
-               "cli" "\n\t"                            \
-               "wdr" "\n\t"                            \
-               "out %0,%1" "\n\t"                      \
-               "out __SREG__,__tmp_reg__" "\n\t"       \
-               "out %0,%2"                             \
-               : /* no outputs */                      \
-               : "I" (_SFR_IO_ADDR(WDTCR)),            \
-                 "r" (0x18),/* _BV(WDCE) | _BV(WDE) */ \
-                 "r" ((unsigned char)(value))          \
-               : "r0"                                  \
-       )
+
+#define _wdt_write(value)   \
+    __asm__ __volatile__ (  \
+        "in __tmp_reg__,__SREG__" "\n\t"    \
+        "cli" "\n\t"    \
+        "wdr" "\n\t"    \
+        "out %0,%1" "\n\t"  \
+        "out __SREG__,__tmp_reg__" "\n\t"   \
+        "out %0,%2" \
+        : /* no outputs */  \
+        : "I" (_SFR_IO_ADDR(_WD_CONTROL_REG)), \
+        "r" (_BV(WDCE) | _BV(WDE)),   \
+        "r" ((uint8_t) ((value & 0x08 ? _WD_PS3_MASK : 0x00) | \
+            _BV(WDE) | (value & 0x07)) ) \
+        : "r0"  \
+    )
+    
 #endif
 
 /**
    \ingroup avr_watchdog
    Enable the watchdog timer, configuring it for expiry after
    \c timeout (which is a combination of the \c WDP0 through
-   \c WDP2 to write into the \c WDTCR register).
+   \c WDP2 bits to write into the \c WDTCR register; For those devices 
+   that have a \c WDTCSR register, it uses the combination of the \c WDP0 
+   through \c WDP3 bits).
 
    See also the symbolic constants \c WDTO_15MS et al.
 */
-#define wdt_enable(timeout) _wdt_write((timeout) | _BV(WDE))
+#define wdt_enable(timeout) _wdt_write(timeout)
 
 /**
    \ingroup avr_watchdog
@@ -131,34 +156,54 @@
    wdt_enable(WDTO_500MS);
    \endcode
 */
-#define WDTO_15MS      0
+#define WDTO_15MS   0
 
 /** \ingroup avr_watchdog
     See \c WDT0_15MS */
-#define WDTO_30MS      1
+#define WDTO_30MS   1
 
 /** \ingroup avr_watchdog See
     \c WDT0_15MS */
-#define WDTO_60MS      2
+#define WDTO_60MS   2
 
 /** \ingroup avr_watchdog
     See \c WDT0_15MS */
-#define WDTO_120MS     3
+#define WDTO_120MS  3
 
 /** \ingroup avr_watchdog
     See \c WDT0_15MS */
-#define WDTO_250MS     4
+#define WDTO_250MS  4
 
 /** \ingroup avr_watchdog
     See \c WDT0_15MS */
-#define WDTO_500MS     5
+#define WDTO_500MS  5
 
 /** \ingroup avr_watchdog
     See \c WDT0_15MS */
-#define WDTO_1S                6
+#define WDTO_1S     6
 
 /** \ingroup avr_watchdog
     See \c WDT0_15MS */
-#define WDTO_2S                7
+#define WDTO_2S     7
+
+#if defined(__AVR_ATtiny2313__) || defined(__AVR_ATmega48__) || \
+defined(__AVR_ATmega88__) || defined(__AVR_ATmega168__)
+
+/** \ingroup avr_watchdog
+    See \c WDT0_15MS
+    Note: This is only available on the ATtiny2313, ATmega48, ATmega88,
+    and the ATmega168.
+    */
+#define WDTO_4S     8
+
+/** \ingroup avr_watchdog
+    See \c WDT0_15MS 
+    Note: This is only available on the ATtiny2313, ATmega48, ATmega88,
+    and the ATmega168.
+    */
+#define WDTO_8S     9
+
+#endif
+
 
 #endif /* _AVR_WDT_H_ */

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