On 01/10/13 09:41, Simon Kirby wrote:
Hello!
How difficult would it be to convince avr-gcc to not re-zero r1 instantly
after mul, but delay it until a zero is actually needed? For example,
see this actual avr-gcc output:
Vneutral = (uint16_t)Vbus * t >> 8;
->
lds r25, 0x20FD
mul r24, r25
movw r24, r0
eor r1, r1
sts 0x205C, r25
Could be just:
lds r25, 0x20FD
mul r24, r25
sts 0x205C, r1
eor r1, r1
Saving one whole cycle! ;)
In general, it would be a good thing to delay the zeroing of r1, and it
is worth searching the issue database for previous issues and filing a
new "missed optimisation" issue if it is not there already: