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[avr-gcc-list] Volatile "Word" registers


From: James Dabbs
Subject: [avr-gcc-list] Volatile "Word" registers
Date: Mon, 27 Oct 2003 14:16:09 -0500

I saw this thread maybe a while back, but can't find references.. Is it
"safe" in GCC to access 16-bit timer1 registers (OCR1A, etc.) as word-wide
variables, or explicitly divide the operation into bytes.  I'm not worried
about splitting accesses across an interrupt, etc. (this has to be managed
either way), but I am worried about the compiler accessing the halves in
proper order.  Looking at code, it *seems* to in the cases I see, but is
this just happenstance or a feature of AVR-GCC?

Thanks.


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