Re: [avr-gcc-list] FREEICE project

[Christian Troedhandl]

On Wed, 13 Aug 2003, Armand ten Doesschate wrote:

> Hi all,
>
> At this moment I know that there is some fuzz about the freeice
> project but I can explain more :
> the freeice project should implement at least 2 synchronous
> protocols : jtag and bdm.
>
Will freeice be able to handle devices placed in a JTAG chain along with
other devices (e.g. an AVR microcontroller and a Xilinx FPGA on the same
daisy-chained JTAG interface)?
The the original Atmel JTAGICE can't do this which is very inconvenient,
since you have to add a seperate interface for each AVR microcontroller.

Christian

---------------------------------------------------------------------
Christian Troedhandl                   mailto:address@hidden
Real-Time Systems Group                     voice:+43 (1) 58801-18224
Vienna University of Technology
A-1040 Wien, Treitlstr. 3/182-1        http://www.vmars.tuwien.ac.at/