Re: ${OBJEXT} in implicit rule

[Nick Bowler]

On 2014-11-12 16:58 +0100, Jan Engelhardt wrote:
> Using automake-1.13.4, when using the following Makefile.am fragment,
> 
> ---8<---
> bin_PROGRAMS = foo
> foo_SOURCES = foo.c bar.k
> .k.${OBJEXT}:
>         gcc -x c -c $< -o $@
> --->8---
> 
> I observe that bar.o is not built and not linked into foo.

Indeed, the use of custom file extensions in _SOURCES seems to be
completely borken.  Literally the only case that appears to work
correctly is when you use a suffix rule and its definition is
precisely of the form:

  .k.$(OBJEXT):
        ...

(where .k can be any custom suffix).

I didn't even know this was a feature at all, but sure enough it's
documented[1].  The astute may note that the examples in the manual have
suffix rules which look a bit different from the one above...

I suggest ignoring this functionality entirely, because the sane way to
add custom compiler rules is to use _LDADD or _LIBADD.  For example:

  bin_PROGRAMS = foo
  foo_SOURCES = foo.c
  foo_LDADD = bar.${OBJEXT}

  .k.${OBJEXT}:
        gcc -x c -c $< -o $@

Everything in _LDADD is simply appended verbatim to the linker command
line.  Automake adds things that look like filenames automatically to
the dependencies of the binary, and everything will work correctly in
most cases.

You can also set foo_DEPENDENCIES and/or EXTRA_foo_DEPENDENCIES
manually in more complicated cases.

[1] §18.2 "Handling new file extensions"
    https://gnu.org/software/automake/manual/automake.html#Suffixes

Cheers,
-- 
Nick Bowler, Elliptic Technologies (http://www.elliptictech.com/)