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[Tinycc-devel] x64 asm, opcode generation, wrong rex/simd prefix order
From: |
temp212 |
Subject: |
[Tinycc-devel] x64 asm, opcode generation, wrong rex/simd prefix order |
Date: |
Sun, 21 Jan 2024 00:13:50 +0600 |
movq %xmm0, (%rsp,%r13,8)
instead of
66 42 0f d6 04 ec
generates
42 66 0f d6 04 ec
GCC:
81: 74 19 je 9c <store_int>
83: 66 42 0f d6 04 ec movq %xmm0,(%rsp,%r13,8)
89: 66 48 0f 7e c0 movq %xmm0,%rax
8e: 4a 89 04 ec mov %rax,(%rsp,%r13,8)
TCC:
88: 0f 84 00 00 00 00 je 8e <arg_loop+0x46>
8e: 42 rex.X
8f: 66 0f d6 04 ec movq %xmm0,(%rsp,%rbp,8)
94: 66 48 0f 7e c0 movq %xmm0,%rax
99: 4a 89 04 ec mov %rax,(%rsp,%r13,8)
- [Tinycc-devel] x64 asm, opcode generation, wrong rex/simd prefix order,
temp212 <=