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Re: [PATCH 5/7] hw/pci: spelling fixes


From: Peter Maydell
Subject: Re: [PATCH 5/7] hw/pci: spelling fixes
Date: Mon, 11 Sep 2023 16:37:15 +0100

On Sat, 9 Sept 2023 at 14:18, Michael Tokarev <mjt@tls.msk.ru> wrote:
>
> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>


> @@ -503,7 +503,7 @@ static void designware_pcie_root_realize(PCIDevice *dev, 
> Error **errp)
>                            &designware_pci_host_msi_ops,
>                            root, "pcie-msi", 0x4);
>      /*
> -     * We initially place MSI interrupt I/O region a adress 0 and
> +     * We initially place MSI interrupt I/O region a address 0 and

"at address 0"

>       * disable it. It'll be later moved to correct offset and enabled
>       * in designware_pcie_root_update_msi_mapping() as a part of
>       * initialization done by guest OS

> diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
> index 7c7316bc96..87ba074254 100644
> --- a/hw/pci-host/gpex-acpi.c
> +++ b/hw/pci-host/gpex-acpi.c
> @@ -177,7 +177,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig 
> *cfg)
>              acpi_dsdt_add_pci_route_table(dev, cfg->irq);
>
>              /*
> -             * Resources defined for PXBs are composed by the folling parts:
> +             * Resources defined for PXBs are composed by the following 
> parts:

Should be "composed of", while we're editing the line.

>               * 1. The resources the pci-brige/pcie-root-port need.
>               * 2. The resources the devices behind pxb need.
>               */

otherwise
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM



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