Re: [qemu-s390x] [PATCH v3 15/15] s390x: Add floating-point extension facility to "qemu" cpu model

[Thomas Huth]

On 18/02/2019 13.27, David Hildenbrand wrote:
> The floating-point extension facility implemented certain changes to
> BFP, HFP and DFP instructions.
> 
> As we don't implement HFP/DFP, we can ignore those completely. Related
> to BFP, the changes include
> - SET BFP ROUNDING MODE (SRNMB) instruction
> - BFP-rounding-mode field in the FPC register is changed to 3 bits
> - CONVERT FROM LOGICAL instructions
> - CONVERT TO LOGICAL instructions
> - Changes (rounding mode + XxC) added to
> -- CONVERT TO FIXED
> -- CONVERT FROM FIXED
> -- LOAD FP INTEGER
> -- LOAD ROUNDED
> -- DIVIDE TO INTEGER
> 
> For TCG, we don't implement DIVIDE TO INTEGER, and it is harder to
> implement, so skip that. Also, as we don't implement PFPO, we can skip
> changes to that as well. The other parts are now implemented, we can
> indicate the facility.
> 
> z14 PoP mentiones that "The floating-point extension facility is installed

"mentions" ?

> in the z/Architecture architectural mode. When bit 37 is one, bit 42 is
> also one.", meaning that the DFP (decimal-floating-point) facility also
> has to be inidicated. We can ignore that for now.

indicated.

> Signed-off-by: David Hildenbrand <address@hidden>
> ---
>  target/s390x/gen-features.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
> index 44eca45474..e4739a6b9f 100644
> --- a/target/s390x/gen-features.c
> +++ b/target/s390x/gen-features.c
> @@ -601,6 +601,11 @@ static uint16_t qemu_V3_1[] = {
>  };
>  
>  static uint16_t qemu_LATEST[] = {
> +    /*
> +     * Only BFP bits are implemented (HFP, DFP, PFPO and DIVIDE TO INTEGER 
> not
> +     * implemented yet).
> +     */
> +    S390_FEAT_FLOATING_POINT_EXT,
>      S390_FEAT_ZPCI,
>  };

Reviewed-by: Thomas Huth <address@hidden>