[qemu-s390x] [PATCH v1 0/3] s390x: SIGP + IRQ preparations for TCG vector register support

[David Hildenbrand]

These are minor preparations for vector instruction support for TCG, also
touching KVM code.

During SIGP STORE ADDITIONAL STATUS we have to properly convert the
endianess. On machine checks, we have to also store the vector registers
into the extended save area.

Both changes are not used by TCG code before we implement + enable
vector instructions. KVM code shares the SIGP STORE ADDITIONAL STATUS
implementation.

Note: Vector registers (128 bit) are modeled as two 64 bit values. Low and
high 64 bit values correspond on big/little systems, however the values
themself need conversion. Documentation for that will be added along with
the actual vector instruction support.

David Hildenbrand (3):
  s390x: Use cpu_to_be64 in SIGP STORE ADDITIONAL STATUS
  s390x: use a QEMU-style typedef + name for SIGP save area struct
  s390x/tcg: Save vregs to extended mchk save area

 target/s390x/excp_helper.c | 46 ++++++++++++++++++++++++++++++++++++--
 target/s390x/helper.c      | 39 ++++++++++++++++++++------------
 target/s390x/internal.h    |  4 +++-
 3 files changed, 72 insertions(+), 17 deletions(-)

-- 
2.17.2