[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v2 1/6] target/riscv/tcg: set 'mmu' with 'satp' in cpu_set_profil
|
From: |
Andrew Jones |
|
Subject: |
[PATCH v2 1/6] target/riscv/tcg: set 'mmu' with 'satp' in cpu_set_profile() |
|
Date: |
Fri, 26 Jan 2024 14:31:03 +0100 |
From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Recent changes in options handling removed the 'mmu' default the bare
CPUs had, meaning that we must enable 'mmu' by hand when using the
rva22s64 profile CPU.
Given that this profile is setting a satp mode, it already implies that
we need a 'mmu'. Enable the 'mmu' in this case.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
target/riscv/tcg/tcg-cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
index da437975b429..88f92d1c7d2c 100644
--- a/target/riscv/tcg/tcg-cpu.c
+++ b/target/riscv/tcg/tcg-cpu.c
@@ -1107,6 +1107,7 @@ static void cpu_set_profile(Object *obj, Visitor *v,
const char *name,
#ifndef CONFIG_USER_ONLY
if (profile->satp_mode != RISCV_PROFILE_ATTR_UNUSED) {
+ object_property_set_bool(obj, "mmu", true, NULL);
const char *satp_prop = satp_mode_str(profile->satp_mode,
riscv_cpu_is_32bit(cpu));
object_property_set_bool(obj, satp_prop, profile->enabled, NULL);
--
2.43.0
- [PATCH v2 0/6] riscv: named features riscv,isa, 'svade' rework, Andrew Jones, 2024/01/26
- [PATCH v2 1/6] target/riscv/tcg: set 'mmu' with 'satp' in cpu_set_profile(),
Andrew Jones <=
- [PATCH v2 2/6] target/riscv: add riscv,isa to named features, Andrew Jones, 2024/01/26
- [PATCH v2 4/6] target/riscv: Reset henvcfg to zero, Andrew Jones, 2024/01/26
- [PATCH v2 3/6] target/riscv: add remaining named features, Andrew Jones, 2024/01/26
- [PATCH v2 5/6] target/riscv: Gate hardware A/D PTE bit updating, Andrew Jones, 2024/01/26
- [PATCH v2 6/6] target/riscv: Promote svade to a normal extension, Andrew Jones, 2024/01/26