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[PATCH v4 01/13] target/riscv: add 'vlenb' field in cpu->cfg
From: |
Daniel Henrique Barboza |
Subject: |
[PATCH v4 01/13] target/riscv: add 'vlenb' field in cpu->cfg |
Date: |
Mon, 22 Jan 2024 13:10:55 -0300 |
Our usage of 'vlenb' is overwhelming superior than the use of 'vlen'.
We're using 'vlenb' most of the time, having to do 'vlen >> 3' or
'vlen / 8' in every instance.
In hindsight we would be better if the 'vlenb' property was introduced
instead of 'vlen'. That's not what happened, and now we can't easily get
rid of it due to user scripts all around. What we can do, however, is to
change our internal representation to use 'vlenb'.
Add a 'vlenb' field in cpu->cfg. It'll be set via the existing 'vlen'
property, i.e. setting 'vlen' will also set 'vlenb'.
We'll replace all 'vlen >> 3' code to use 'vlenb' directly. Start with
the single instance we have in target/riscv/cpu.c.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/cpu.c | 4 +++-
target/riscv/cpu_cfg.h | 1 +
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index ad1df2318b..89f2349eb4 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -852,7 +852,7 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f, int
flags)
csr_ops[csrno].name, val);
}
}
- uint16_t vlenb = cpu->cfg.vlen >> 3;
+ uint16_t vlenb = cpu->cfg.vlenb;
for (i = 0; i < 32; i++) {
qemu_fprintf(f, " %-8s ", riscv_rvv_regnames[i]);
@@ -1320,6 +1320,7 @@ static void riscv_cpu_init(Object *obj)
/* Default values for non-bool cpu properties */
cpu->cfg.pmu_mask = MAKE_64BIT_MASK(3, 16);
cpu->cfg.vlen = 128;
+ cpu->cfg.vlenb = 128 >> 3;
cpu->cfg.elen = 64;
cpu->cfg.cbom_blocksize = 64;
cpu->cfg.cbop_blocksize = 64;
@@ -1819,6 +1820,7 @@ static void prop_vlen_set(Object *obj, Visitor *v, const
char *name,
cpu_option_add_user_setting(name, value);
cpu->cfg.vlen = value;
+ cpu->cfg.vlenb = value >> 3;
}
static void prop_vlen_get(Object *obj, Visitor *v, const char *name,
diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h
index fea14c275f..50479dd72f 100644
--- a/target/riscv/cpu_cfg.h
+++ b/target/riscv/cpu_cfg.h
@@ -140,6 +140,7 @@ struct RISCVCPUConfig {
uint32_t pmu_mask;
uint16_t vlen;
+ uint16_t vlenb;
uint16_t elen;
uint16_t cbom_blocksize;
uint16_t cbop_blocksize;
--
2.43.0
- [PATCH v4 00/13] target/riscv: add 'cpu->cfg.vlenb', remove, Daniel Henrique Barboza, 2024/01/22
- [PATCH v4 01/13] target/riscv: add 'vlenb' field in cpu->cfg,
Daniel Henrique Barboza <=
- [PATCH v4 02/13] target/riscv/csr.c: use 'vlenb' instead of 'vlen', Daniel Henrique Barboza, 2024/01/22
- [PATCH v4 03/13] target/riscv/gdbstub.c: use 'vlenb' instead of shifting 'vlen', Daniel Henrique Barboza, 2024/01/22
- [PATCH v4 04/13] target/riscv/insn_trans/trans_rvbf16.c.inc: use cpu->cfg.vlenb, Daniel Henrique Barboza, 2024/01/22
- [PATCH v4 05/13] target/riscv/insn_trans/trans_rvv.c.inc: use 'vlenb', Daniel Henrique Barboza, 2024/01/22
- [PATCH v4 06/13] target/riscv/insn_trans/trans_rvvk.c.inc: use 'vlenb', Daniel Henrique Barboza, 2024/01/22
- [PATCH v4 07/13] target/riscv/vector_helper.c: use 'vlenb', Daniel Henrique Barboza, 2024/01/22
- [PATCH v4 08/13] target/riscv/vector_helper.c: use vlenb in HELPER(vsetvl), Daniel Henrique Barboza, 2024/01/22
- [PATCH v4 09/13] target/riscv/insn_trans/trans_rvv.c.inc: use 'vlenb' in MAXSZ(), Daniel Henrique Barboza, 2024/01/22
- [PATCH v4 10/13] target/riscv/cpu.h: use 'vlenb' in vext_get_vlmax(), Daniel Henrique Barboza, 2024/01/22
- [PATCH v4 11/13] target/riscv: change vext_get_vlmax() arguments, Daniel Henrique Barboza, 2024/01/22