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Re: [PATCH v4 16/17] target/riscv/cpu.c: move 'mimpid' to riscv_cpu_prop
From: |
Alistair Francis |
Subject: |
Re: [PATCH v4 16/17] target/riscv/cpu.c: move 'mimpid' to riscv_cpu_properties[] |
Date: |
Fri, 12 Jan 2024 11:29:13 +1000 |
On Sat, Jan 6, 2024 at 9:07 AM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> Keep all class properties in riscv_cpu_properties[].
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/cpu.c | 68 ++++++++++++++++++++++++----------------------
> 1 file changed, 36 insertions(+), 32 deletions(-)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index c725a4839d..6149f5960e 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -2009,6 +2009,41 @@ static const PropertyInfo prop_mvendorid = {
> .set = prop_mvendorid_set,
> };
>
> +static void prop_mimpid_set(Object *obj, Visitor *v, const char *name,
> + void *opaque, Error **errp)
> +{
> + bool dynamic_cpu = riscv_cpu_is_dynamic(obj);
> + RISCVCPU *cpu = RISCV_CPU(obj);
> + uint64_t prev_val = cpu->cfg.mimpid;
> + uint64_t value;
> +
> + if (!visit_type_uint64(v, name, &value, errp)) {
> + return;
> + }
> +
> + if (!dynamic_cpu && prev_val != value) {
> + error_setg(errp, "Unable to change %s mimpid (0x%" PRIu64 ")",
> + object_get_typename(obj), prev_val);
> + return;
> + }
> +
> + cpu->cfg.mimpid = value;
> +}
> +
> +static void prop_mimpid_get(Object *obj, Visitor *v, const char *name,
> + void *opaque, Error **errp)
> +{
> + uint64_t value = RISCV_CPU(obj)->cfg.mimpid;
> +
> + visit_type_uint64(v, name, &value, errp);
> +}
> +
> +static const PropertyInfo prop_mimpid = {
> + .name = "mimpid",
> + .get = prop_mimpid_get,
> + .set = prop_mimpid_set,
> +};
> +
> /*
> * RVA22U64 defines some 'named features' or 'synthetic extensions'
> * that are cache related: Za64rs, Zic64b, Ziccif, Ziccrse, Ziccamoa
> @@ -2096,6 +2131,7 @@ static Property riscv_cpu_properties[] = {
> {.name = "cboz_blocksize", .info = &prop_cboz_blksize},
>
> {.name = "mvendorid", .info = &prop_mvendorid},
> + {.name = "mimpid", .info = &prop_mimpid},
>
> #ifndef CONFIG_USER_ONLY
> DEFINE_PROP_UINT64("resetvec", RISCVCPU, env.resetvec, DEFAULT_RSTVEC),
> @@ -2177,35 +2213,6 @@ static const struct SysemuCPUOps riscv_sysemu_ops = {
> };
> #endif
>
> -static void cpu_set_mimpid(Object *obj, Visitor *v, const char *name,
> - void *opaque, Error **errp)
> -{
> - bool dynamic_cpu = riscv_cpu_is_dynamic(obj);
> - RISCVCPU *cpu = RISCV_CPU(obj);
> - uint64_t prev_val = cpu->cfg.mimpid;
> - uint64_t value;
> -
> - if (!visit_type_uint64(v, name, &value, errp)) {
> - return;
> - }
> -
> - if (!dynamic_cpu && prev_val != value) {
> - error_setg(errp, "Unable to change %s mimpid (0x%" PRIu64 ")",
> - object_get_typename(obj), prev_val);
> - return;
> - }
> -
> - cpu->cfg.mimpid = value;
> -}
> -
> -static void cpu_get_mimpid(Object *obj, Visitor *v, const char *name,
> - void *opaque, Error **errp)
> -{
> - uint64_t value = RISCV_CPU(obj)->cfg.mimpid;
> -
> - visit_type_uint64(v, name, &value, errp);
> -}
> -
> static void cpu_set_marchid(Object *obj, Visitor *v, const char *name,
> void *opaque, Error **errp)
> {
> @@ -2286,9 +2293,6 @@ static void riscv_cpu_class_init(ObjectClass *c, void
> *data)
> cc->gdb_arch_name = riscv_gdb_arch_name;
> cc->gdb_get_dynamic_xml = riscv_gdb_get_dynamic_xml;
>
> - object_class_property_add(c, "mimpid", "uint64", cpu_get_mimpid,
> - cpu_set_mimpid, NULL, NULL);
> -
> object_class_property_add(c, "marchid", "uint64", cpu_get_marchid,
> cpu_set_marchid, NULL, NULL);
>
> --
> 2.43.0
>
>
- [PATCH v4 10/17] target/riscv: create finalize_features() for KVM, (continued)
- [PATCH v4 10/17] target/riscv: create finalize_features() for KVM, Daniel Henrique Barboza, 2024/01/05
- [PATCH v4 11/17] target/riscv: move 'cbom_blocksize' to riscv_cpu_properties[], Daniel Henrique Barboza, 2024/01/05
- [PATCH v4 13/17] target/riscv: move 'cboz_blocksize' to riscv_cpu_properties[], Daniel Henrique Barboza, 2024/01/05
- [PATCH v4 12/17] target/riscv: move 'cbop_blocksize' to riscv_cpu_properties[], Daniel Henrique Barboza, 2024/01/05
- [PATCH v4 14/17] target/riscv: remove riscv_cpu_options[], Daniel Henrique Barboza, 2024/01/05
- [PATCH v4 15/17] target/riscv/cpu.c: move 'mvendorid' to riscv_cpu_properties[], Daniel Henrique Barboza, 2024/01/05
- [PATCH v4 16/17] target/riscv/cpu.c: move 'mimpid' to riscv_cpu_properties[], Daniel Henrique Barboza, 2024/01/05
- Re: [PATCH v4 16/17] target/riscv/cpu.c: move 'mimpid' to riscv_cpu_properties[],
Alistair Francis <=
- [PATCH v4 17/17] target/riscv/cpu.c: move 'marchid' to riscv_cpu_properties[], Daniel Henrique Barboza, 2024/01/05
- Re: [PATCH v4 00/17] target/riscv: deprecate riscv_cpu_options[], Vladimir Isaev, 2024/01/09
- Re: [PATCH v4 00/17] target/riscv: deprecate riscv_cpu_options[], Alistair Francis, 2024/01/11