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[PATCH 09/16] target/riscv: Expose some 'trigger' prototypes from debug.
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH 09/16] target/riscv: Expose some 'trigger' prototypes from debug.c |
Date: |
Tue, 27 Jun 2023 01:20:00 +0200 |
We want to extract TCG-specific code from debug.c, but some
functions call get_trigger_type() / do_trigger_action().
Expose these prototypes in "debug.h".
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/riscv/debug.h | 4 ++++
target/riscv/debug.c | 5 ++---
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/target/riscv/debug.h b/target/riscv/debug.h
index c471748d5a..65cd45b8f3 100644
--- a/target/riscv/debug.h
+++ b/target/riscv/debug.h
@@ -147,4 +147,8 @@ void riscv_trigger_init(CPURISCVState *env);
bool riscv_itrigger_enabled(CPURISCVState *env);
void riscv_itrigger_update_priv(CPURISCVState *env);
+
+target_ulong get_trigger_type(CPURISCVState *env, target_ulong trigger_index);
+void do_trigger_action(CPURISCVState *env, target_ulong trigger_index);
+
#endif /* RISCV_DEBUG_H */
diff --git a/target/riscv/debug.c b/target/riscv/debug.c
index 75ee1c4971..5676f2c57e 100644
--- a/target/riscv/debug.c
+++ b/target/riscv/debug.c
@@ -88,8 +88,7 @@ static inline target_ulong extract_trigger_type(CPURISCVState
*env,
}
}
-static inline target_ulong get_trigger_type(CPURISCVState *env,
- target_ulong trigger_index)
+target_ulong get_trigger_type(CPURISCVState *env, target_ulong trigger_index)
{
return extract_trigger_type(env, env->tdata1[trigger_index]);
}
@@ -217,7 +216,7 @@ static inline void warn_always_zero_bit(target_ulong val,
target_ulong mask,
}
}
-static void do_trigger_action(CPURISCVState *env, target_ulong trigger_index)
+void do_trigger_action(CPURISCVState *env, target_ulong trigger_index)
{
trigger_action_t action = get_trigger_action(env, trigger_index);
--
2.38.1
- [PATCH 00/16] target/riscv: Allow building without TCG (KVM-only so far), Philippe Mathieu-Daudé, 2023/06/26
- [PATCH 01/16] target/riscv: Remove unused 'instmap.h' header in translate.c, Philippe Mathieu-Daudé, 2023/06/26
- [PATCH 02/16] target/riscv: Restrict KVM-specific fields from ArchCPU, Philippe Mathieu-Daudé, 2023/06/26
- [PATCH 03/16] target/riscv: Restrict sysemu specific header to user emulation, Philippe Mathieu-Daudé, 2023/06/26
- [PATCH 04/16] target/riscv: Restrict 'rv128' machine to TCG accelerator, Philippe Mathieu-Daudé, 2023/06/26
- [PATCH 05/16] target/riscv: Move sysemu-specific files to target/riscv/sysemu/, Philippe Mathieu-Daudé, 2023/06/26
- [PATCH 06/16] target/riscv: Restrict riscv_cpu_do_interrupt() to sysemu, Philippe Mathieu-Daudé, 2023/06/26
- [PATCH 07/16] target/riscv: Move TCG-specific files to target/riscv/tcg/, Philippe Mathieu-Daudé, 2023/06/26
- [PATCH 08/16] target/riscv: Move TCG-specific cpu_get_tb_cpu_state() to tcg/cpu.c, Philippe Mathieu-Daudé, 2023/06/26
- [PATCH 09/16] target/riscv: Expose some 'trigger' prototypes from debug.c,
Philippe Mathieu-Daudé <=
- [PATCH 10/16] target/riscv: Extract TCG-specific code from debug.c, Philippe Mathieu-Daudé, 2023/06/26
- [PATCH 11/16] target/riscv: Move sysemu-specific debug files to target/riscv/sysemu/, Philippe Mathieu-Daudé, 2023/06/26
- [PATCH 12/16] target/riscv: Expose riscv_cpu_pending_to_irq() from cpu_helper.c, Philippe Mathieu-Daudé, 2023/06/26
- [RFC PATCH 13/16] target/riscv: Move TCG/sysemu-specific code to tcg/sysemu/cpu_helper.c, Philippe Mathieu-Daudé, 2023/06/26
- [PATCH 14/16] target/riscv: Move sysemu-specific code to sysemu/cpu_helper.c, Philippe Mathieu-Daudé, 2023/06/26
- [PATCH 15/16] target/riscv: Restrict TCG-specific prototype declarations, Philippe Mathieu-Daudé, 2023/06/26
- [PATCH 16/16] gitlab-ci.d/crossbuilds: Add KVM riscv64 cross-build jobs, Philippe Mathieu-Daudé, 2023/06/26
- Re: [PATCH 00/16] target/riscv: Allow building without TCG (KVM-only so far), Daniel Henrique Barboza, 2023/06/27