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[PULL 8/9] target/riscv: avoid env_archcpu() in cpu_get_tb_cpu_state()
From: |
Palmer Dabbelt |
Subject: |
[PULL 8/9] target/riscv: avoid env_archcpu() in cpu_get_tb_cpu_state() |
Date: |
Fri, 17 Feb 2023 09:52:02 -0800 |
From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
We have a RISCVCPU *cpu pointer available at the start of the function.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Message-ID: <20230210123836.506286-1-dbarboza@ventanamicro.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
target/riscv/cpu_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index ad8d82662c..3a9472a2ff 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -60,7 +60,7 @@ void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong
*pc,
* which is not supported by GVEC. So we set vl_eq_vlmax flag to true
* only when maxsz >= 8 bytes.
*/
- uint32_t vlmax = vext_get_vlmax(env_archcpu(env), env->vtype);
+ uint32_t vlmax = vext_get_vlmax(cpu, env->vtype);
uint32_t sew = FIELD_EX64(env->vtype, VTYPE, VSEW);
uint32_t maxsz = vlmax << sew;
bool vl_eq_vlmax = (env->vstart == 0) && (vlmax == env->vl) &&
--
2.39.0
- [PULL 0/9] Fourth RISC-V PR for QEMU 8.0, Palmer Dabbelt, 2023/02/17
- [PULL 2/9] hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel(), Palmer Dabbelt, 2023/02/17
- [PULL 1/9] hw/riscv: handle 32 bit CPUs kernel_entry in riscv_load_kernel(), Palmer Dabbelt, 2023/02/17
- [PULL 3/9] hw/riscv/boot.c: make riscv_load_initrd() static, Palmer Dabbelt, 2023/02/17
- [PULL 5/9] target/riscv: Remove privileged spec version restriction for RVV, Palmer Dabbelt, 2023/02/17
- [PULL 6/9] MAINTAINERS: Add some RISC-V reviewers, Palmer Dabbelt, 2023/02/17
- [PULL 7/9] target/riscv: Smepmp: Skip applying default rules when address matches, Palmer Dabbelt, 2023/02/17
- [PULL 8/9] target/riscv: avoid env_archcpu() in cpu_get_tb_cpu_state(),
Palmer Dabbelt <=
- [PULL 4/9] roms/opensbi: Upgrade from v1.1 to v1.2, Palmer Dabbelt, 2023/02/17
- [PULL 9/9] target/riscv: Fix vslide1up.vf and vslide1down.vf, Palmer Dabbelt, 2023/02/17
- Re: [PULL 0/9] Fourth RISC-V PR for QEMU 8.0, Peter Maydell, 2023/02/21